CMOS Circuit Design & Spice Simulation using SKY130 Technology

Digital System Design and Modelling using Verilog

RISC-V based MYTH (Microprocessor for You in Thirty Hours)

Learn how to design and Characterize basic MOS elements using SKY130 PDKs and ngSPICE Simulator. CMOS inverter is one of the most basic logic circuit elements in the digital circuits. 

Learn basic of Transistors, Logic gate, High Level design Modelling, Simulator definitions, Introduction to Verilog, delay modelling, behavioural modelling, memory modelling and Verilog tasks and functions.

A beginner level 5-day workshop to understand RISC-V Specs, RISC-V Software, TL-Verliog, Simulate RISC-V core.In short, you are going to write RTL and build RISC-V core on your own

Beginner Physical design using open-source EDA Tools

Advanced Physical Design using OpenLANE/Sky130

RTL design using Verilog with SKY130 Technology

Build and configure SoC, understand analog peripheral (ADC, DAC, POR), digital peripheral (UART, flash controller), memory mapping, top level connections like pad-frame, level-shifters, GPIO

From a RTL netlist to final tape-out, each phase of PnR brings it’s own challenges and surprises. Learn SoC design planning in Openlane flow using the latest Google-SkyWater 130nm process node.

Learn basics of digital design using verilog language, various RTL coding styles, typical synthesis problems faced by industry and how to solve them in Verilog

Low Power Design

Advanced Synthesis and STA with DC

 For the first time outside corporate settings, this course covers Voltage Aware Booleans in great detail with labs. Low Power Design for the IOT era is another new module.

Synthesis of logic circuits plays a crucial role in optimizing the logic and achieving the targeted performance, area and power goals of an IC.