VSD IP Specs

Analog & Mixed Signal IP

ADC (avsdadc_3v3)

10 bit ADC 3.3v analog voltage, 1.8v digital voltage and 1 off-chip external voltage reference

avsdadc_3v3

DAC (avsddac_3v3)

10bit potentiometric DAC 3.3v analog voltage, 1.8v digital voltage and 1 off-chip external voltage reference

avsddac_3v3

Bandgap (avsdbgp_3v3)

General purpose Bandgap

avsdbgp_3v3

On-chip PLL (avsdpll_3v3) Clock multiplier (pll) (Fclkin – 5MHz to 12Mhz, Fclkout – 40MHz to 100MHz at 1.8v

avsdpll_3v3

Crystal oscillator analog pad (avsdxtosc_3v3)

Crystal oscillator analog pads (3.3V, Fclkout-1MHz-4MHz)

avsdxtosc_3v3

Comparator (avsdcmp_3v3)

Lower power current programmable CMOS comparator with hysteresis

avsdcmp_3v3

Memory & I/O Library

vsdbbcud4f

Bi-directional Buffer with Non-Inverting CMOS Input and Gated Pull-down and Pull-up, Strength 4mA @ 3.3V, Normal, High noise (Fast speed)

VSDBBCUD4F

SRAM 4 kb or 32 bits

SRAM (1024 x 32): (32kbits or 4kB), 1.8V and access time is <2.5ns

mem4kBytesOr32kbitsSpec

Tools and Design Flow

Circuit to Layout

Open-source Layout Generator

CircuitToLayoutToolFlow

Power Analysis Methodology

Open-source Power Calculator

PowerAnalysisMethodology.DOCX

VSDFLOW (VLSI System Design Flow)

An automated RTL2GDS open-source flow

vsdflow