Phase-Locked Loop(PLL) IC design on Open-Source Google-Skywater 130nm
This basic overview of Phase-Locked Loop IC design on Open-Source Google-Skywater 130nm node, takes an intuitive approach to designing a simple PLL with extraordinarily little math and without diving into complex frequency domain analysis or control system theory. The tools that will be used are Ngspice and Magic. These tools will be briefly covered, and no prior knowledge of these tools is required to take this course. Starting with basic PLL concepts, this overview spans all the steps in the IC design flow - circuit design, simulation, layout, parasitics extraction, post layout simulation and finally, it also briefly includes the use of the latest caravel harness to make tapeouts - all in just 100mins to save your time! The basics needed to start your exploration into PLLs is covered. An undergraduate-level understanding of electronic circuits and VLSI, is a prerequisite.