2020

JOIN VSDOpen2020 and be a part of open-source revolution !!

VSDOpen 2020 is bigger and better !!
VSDOpen 2020 has LIVE Tutorial Session for first 3 days
VSDOpen 2020 will showcase open-source analog IP’s
VSDOpen 2020 is for 4-days

We are really excited to showcase some masterpieces of work done by Research Interns over last year, and also, we are really excited to introduce you to novel techniques of learning and designing analog/digital IP’s. This time, we are about to showcase you a list of projects which was achieved for the very first time in the field of open-source.

To Begin with: First time in the open-source world, 
  • We have open-source analog IP’s built from scratch using OSU-180nm PDK, Magic and eSim EDA tools, by undergrad and postgrad students. Unbelievable!!
  • We displayed to the RISC-V community around the globe how you can design a basic RISC-V core in just 5-days from scratch using TL-Verilog and Makerchip IDE. Unbelievable!!
  • We released a cloud-based VSD-Intelligent Assessment Technology platform which enables VLSI training for all time-zones at one go and is about 99% effective compared to any other training around the globe.
  • We will show you how you can develop your own SoC using real 130nm PDK from Skywater and OpenLANE EDAtool-chain from efabless

VSDOpen 2020 Distinguished Speaker

Conference Date

VSDOpen 2020 Conference Schedule

Time (IST)

Session

Talk Title

Speaker

Organisation/University

08:00-08:15

VSDOpen 2020 Inauguration

Inception of Online Conference

Kunal Ghosh

VSD

08:15-08:45

Keynote

Applying Community Models to ICs: Why and How

Michael Wishart

Efabless

08:45-09:05

Open Source IP Designer track

SRAM (1024 x 32): (32kbits or 4kB), 1.8V and access time is <2.5ns (OpenRAM)

Yash Kumar

Fr. Conceicao Rodrigues College of Engineering, Mumbai University

09:05-09:25

Open Source IP Designer track

Next Gen open-source VLSI/RISC-V trainings using VSD-IAT, Makerchip and TL-Verilog

Shivani Shah

International Institute of Information Technology, Bangalore

09:30-10:00

Keynote

RISC-V and open source hardware – A golden opportunity for India semiconductor industry

Naveed Sherwani

SiFive

10:20-10:40

Open Source IP Designer track

10bit potentiometric DAC 3.3v analog voltage, 1.8v digital voltage and 1 off-chip external voltage reference

Ashutosh Sharma

Indian Institute of Information Technology Design and Manufacturing, Kurnool

10:40-11:05

Open Source IP Designer track

On-chip Clock multiplier (pll) (Fclkin – 5MHz to 12Mhz, Fclkout – 40MHz to 100MHz at 1.8v

Paras Sanjay Gidd

Manipal Institute of Technology, Manipal, Mangalore

11:05-11:15

Networking Break

Forum is open for all

Community


11:15-11:45

Keynote

Computation in the Post-Moore Era: Reflecting on the The role of Open Source

Jan Rabey

Berkeley University

11:45-12:15

Industry Talk

A brief history of open hardware: learning from the freeand open source software movement

Jeremy Bennett

Embecosm

12:15-12:45

Open Source IP Designer track

10 bit ADC 3.3v analog voltage, 1.8v digital voltage and 1 off-chip external voltage reference

Sheryl Serrao, Ananya Ghorai, Shalini Priya, Uday Vempalli

FRCIT Mumbai, IIT(ISM)Dhanbad, NIT Jamshedpur,SIET Puttur, IIIT Bangalore

12:45-13:15

Talk by Govt. of India

Government Initiatives in ESDM Space

Sunita Verma

Meity, Govt. Of India

13:15-13:45

VSDOpen Closing

Future path of Open source and VSD

Anagha & Kunal

VSD

13:45-14:00

Networking

Forum is open for all

Community

In Collaboration with:

Presentation of the video courses powered by Udemy for WordPress.

VSD Statistics

0

Online Beginner Course

0

RTL GDSII VSD-IAT Workshop

0

VSD Community Based Silicon Tape Out

0

Analog & Mixed Signal IPs

0

VSDOpen Online Conference

0

Unique Global students

0

VSD Hackathon Participants

0

VSDSquadron Educational and Dev Kit

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Registration for Ethical RISC-V IoT Workshop

Welcome to Ethical RISC-V IoT Workshop

The “Ethical RISC-V IoT Workshop” at IIIT Bangalore, organized in collaboration with VSD, is a structured, educational competition aimed at exploring real-world challenges in IoT and embedded systems. Participants progress through three stages: building an application, injecting and managing faults, and enhancing application security. The event spans from May 9 to June 15, 2024, culminating in a showcase of top innovations and an award ceremony. This hands-on hackathon emphasizes learning, testing, and securing applications in a collaborative and competitive environment.

Rules :
  1. Only for Indian Student whose college is registered under VTU
  2. Only team of 2 members can Register
  3. Use only VSDSquadron Mini resources for product development
Awards :
  1. Prize money for final 10 Team
  2. 3 Winner team’s Product will be evaluated for Incubation
  3. 7 consolation prizes
  4. Completion Certificate to final round qualifier
  5. Chance to build a Proud Secured RISC-V Platform for India

Date for Registration : 9th May - 22nd May, 2024
Hackathon Inauguration : 23rd May 2024

VSDSquadron (Educational Board)

VSDSquadron, a cutting-edge development board based on the RISC-V architecture that is fully open-source. This board presents an exceptional opportunity for individuals to learn about RISC-V and VLSI chip design utilizing only open-source tools, starting from the RTL and extending all the way to the GDSII. The possibilities for learning and advancement with this technology are limitless.

Furthermore, the RISC-V chips on these boards should be open for VLSI chip design learning, allowing you to explore PNR, standard cells, and layout design. And guess what? vsdsquadron is the perfect solution for all your needs! With its comprehensive documentation and scalable labs, thousands of students can learn and grow together.

VSD HDP (Hardware Design Program) Duration-10 Week

With VSD Hardware Design Program (VSD-HDP),  you have the opportunity to push the boundaries of what exist in open source and establish the new benchmark for tomorrow.

It will leverage your degree in Electrical or Computer Engineering to work with

  • Programmable logic
  • Analog/ digital IP
  • RISC-V
  • Architecture & microprocessors
  • ASICs and SoCs on high-density digital or RF circuit cards
  • Gain hands-on knowledge during design validation and system integration.

Sounds exciting to just get started with expert mentors, doesn’t it? But we are looking for the next generation of learners, inventors, rebels, risk takers, and pioneers.

“Spend your summer working in the future !!”

Outcomes of VSD Online Research IP Design Internship Program

  1. Job opportunities in Semiconductor Industry
  2. Research work can be submitted to VLSI International journals
  3. Participate in Semiconductor International Conference with Internship Research Work
  4. Paper Publications in IEEE Conference and SIG groups
  5. Tape out opportunity and IP Royalty
  6. Interact with world class Semiconductor designer and researchers
  7. Academic professions where more research projects are encouraged.
  8. All the above research and publication work will help colleges and institutes to improve accreditation levels.

Know More Information

VSD – Intelligent Assessment Technology (VSD-IAT)

VSD – Intelligent Assessment Technology (VSD-IAT) is expertly built training platform and is suited for designer requirements. Semiconductor companies understand the value of training automation and Engineer performance enhancement, and do not need to be convinced of the impact of a virtual platform for learning. VSD trainings are quick, relevant, and easy to access from any device at any time zone.

VSD Intern Webinars

VSD Interns made it happen !!

VSD is working towards creating innovative talent pool who are ready to develop design and products for the new tech world. VSD believes in “Learning by doing principle” , and always prepare the student to apply the knowledge learned in the workshops, webinars and courses. We always push our students to work on new designs, test it and work continuously till it becomes the best performing design. Any student who enrolls to VSD community starts working with small design and grows with us and develops a tapeout level design with complete honesty and dedication towards the Work !!

Check out VSD Interns Achievement!

VSDOpen Online Conference

Welcome to the World’s only online conference in Semiconductor Industry VSDOpen Conference. With enormous support and global presence of audience from different segments of industrial lobby and academia made a highly successful event. Evolution is change in the genetic makeup of a population over time, online conference is one kind evaluation everyone adapt soon. 

  • VSDOpen 2022 is an online conference to share open-source research with the community and promote  hardware design mostly done by the student community.
  • VSDOpen 2022 is based on the theme “How to lower the cost to learn, build, and tapeout chips ?”  , which will provide a platform to community to build stronger designs and strengthen the future of Chip design.
  • VSDOpen is envisioned to create a community based revolution in semiconductor hardware technology.
  • The open source attitude is required to bring out the talent and innovation from the community who are in remote part of world and have least access to the technologies.  And now Google support will help to bring the vision to execution by VSD team. 

VSD Online Course by Kunal Ghosh

VSD offers online course in complete spectrum of vlsi backend flow from RTL design, synthesis and Verification, SoC planning and design, Sign-off analysis, IP Design, CAD/EDA automation and basic UNIX/IT, Introduction to latest technology – RISC-V, Machine intelligence in EDA/CAD, VLSI Interview FAQ’s.

Current Reach – As of 2021, VSD and its partners have released 41 online VLSI courses and was successfully able to teach  ~35900 Unique students around 151 countries in 47 different languages, through its unique info-graphical and technology mediated learning methods.

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