Upcoming Event…

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Sreedhara Kolindala, Hardware Design Expertise

Webinar Title : VLSI : Hardware Borad Design Flow 

Date : Coming Soon !! 

Registration Link : https://forms.gle/smESwWwcxtkkkcvV7

About Instructor : Mr Sreedhara Kolindala, is a Hardware design expert with 14+ years of experiance in hardware products development life cycle. His area of expertise in board design, development, power supply designs, PCB layout, signal integrity, power integrity simulations and worked with high speed interfaces

 

Previous Webinar !!

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Dr. Sameer Pawanekar,Physical Design Algorithms Expertise

Webinar Title : KAPEES:A HIGH QUALITY VLSI PLACEMENT ENGINE

Date : 4th April 2020 9 AM IST

Registration Link : https://forms.gle/smESwWwcxtkkkcvV7

About Instructor : Dr Sameer Pawanekar obtained his PhD from IIT Guwahati in 2018 and M Tech feom IIT Bombay in 2001. His area of research was Physical deaign algorithms. He has developed a VLSI placement tool indigenously during his PhD research and silved several smaller problems in physical design. Dr. Pawanekar also has experience in Design verification domain in the semiconductor industry for 18 years.

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Dr. G S Javed, Analog Design Manager, Founder,King Consultants Education

Webinar Title : Negative feedback in Analog IC Design

Date : 2nd April 2020, 4 PM IST

Registration link : https://forms.gle/P5DXQnzmhUdhD4Xt5

About Speaker : Dr G S Javed is an Analog IC design manager with 11+ years of experience in design, layout and characterization of Analog Circuits. He received his M.S. and Ph.D. from the Indian Institute of Science (IISc), Bangalore in 2016. He worked on low power integrated instrumentation circuits for sensing applications. From 2016 – 2020, he led the team on High Speed Circuits and managed a team of 10+ designers at Terminus Circuits Pvt Ltd. From 2012 – 2016, he was a Senior Research Fellow at IISc working on integrated sensor interfaces. He has over 20 peer reviewed journals and IEEE conference publications to his credit. He is also an active speaker and motivator on Analog Circuit Design, High Speed Interface Design, Design Thinking, Entrepreneurship, Research Methodologies. Technical Writing and Spirit of Entrepreneurship. He is a Senior Member of the IEEE and was inducted into the IEEE Eta Kappa Nu – the Honour society of IEEE.

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Niraj Nayan Sharma, Head – India, Bluespec, Inc., 

Research Scholar- EE Dept IIT Bombay

Webinar Title : An Overview & Introduction to HL- HDLs with Bluespec 

Date : –3rd April 2020 5 PM IST

Registration link : https://forms.gle/HVXATEzDXdNVcthN8

About Speaker :Niraj Sharma is responsible for Bluespec in India, and has been a part of the VLSI industry since 2000. He is currently also working towards his Ph.D. at IIT Bombay. His research interests are in high-performance embedded computing, distributed computing and system design.

For details, Email, Call or WhatsApp :

Anagha Ghosh (vsd@vlsisystemdesign.com, 8548037643)