Courses taught by Kunal Ghosh

VSD content is developed using a simple formulae to break the complex diagrams in such a fashion to understand each vlsi concept seamlessly. Our blended learning helps understand  concepts mapped with open source tools. An extensive course catalog--ranging from basic vlsi concepts to advanced tool training webinars--is delivered by VSD experts and available worldwide through our online courses.

VSD offers training in complete spectrum of vlsi backend flow from RTL design, synthesis and Verification, SoC planning and design, Sign-off analysis, IP Design, CAD/EDA automation and basic UNIX/IT, Introduction to latest technology - RISC-V, Machine intelligence in EDA/CAD, VLSI Interview FAQ's.

Training Course :

RTL design, Synthesis and VerificationSoC planning and Design
Sign-off analysis
VSD - RTL Synthesis Q&A WebinarVSD - Physical Design FlowVSD - Static Timing Analysis - I
VSD - Pipelining RISC-V with Transaction-Level VerilogVSD - Clock Tree Synthesis - Part 1VSD - Static Timing Analysis - II
VSD - Embedded-UVM(Open Source Verification and Emulation)VSD - Clock Tree Synthesis - Part 2VSD - Static Timing Analysis (STA) Webinar
VSD – Functional Verification Using Embedded-UVM – Part 1VSD - Physical Design Webinar using EDA tool 'Proton' VSD - Signal Integrity
VSD - Functional Verification Using Embedded-UVM - Part 2VSD - Making the Raven chip: How to design a RISC-V SoCVSD - Timing ECO (engineering change order) webinar
VSD - SoC Design of the PicoRV32 RISCV micro-processorVSD - Distributed timing analysis within 100 lines code
IP DesignCAD/EDA automation and basic UNIX/ITRISC-V, Machine intelligence in EDA/CA
VSD - Circuit Design & SPICE Simulations - Part 1VSD - A complete guide to install open-source EDA toolsVSD - RISCV : Instruction Set Architecture (ISA) - Part 1a
VSD - Circuit Design & SPICE Simulations - Part 2 VSD - TCL programming - From novice to expert - Part 1 VSD - RISCV : Instruction Set Architecture (ISA) - Part 1b
VSD - Custom Layout VSD - TCL programming - From novice to expert - Part 2 VSD - Machine Intelligence in EDA/CAD
VSD - Library characterization and modelling - Part 1
VSD - Library characterization and modelling - Part 2
VSDOpen ONLINE ConferenceOpen Source Tool Installation VSD Intern Courses
VSDOpen2018 - First ever online VLSI conferenceVSD - A complete guide to install open-source EDA toolsVSD Intern – Mixed Signal Physical Design Flow
VSDOpen2019 – VLSI online conferenceVSD - A complete guide to install Openlane and Sky130nm PDKVSD Intern - OpenRAM configuration for 4kB SRAM using Sky130
VSDOpen 2020 VLSI online conferenceVSD Intern – Analog Bandgap Reference design using Sky130
VSD Intern – Analog Comparator Design using Sky130
VSD Intern – DAC IP design using Sky130 PDKs – Part 1
VSD Intern - DAC IP Design using Sky130 PDKs - Part 2
VSD Intern – DAC IP design using Sky130 PDKs – Part 3
VVSD Intern - 10-bit DAC design using eSim and Sky130
VSD Intern - FPGA flow for Mixed Signal SoC with RISC-V based core and PLL IP

NPTEL Talk : "Transforming the Silicon Industry Through Open-Source"