Concepts – Page 4 – VLSI System Design

Are you ready for Embedded-UVM webinar?

Hey There, Of-course there is a requirement for open-source verification, but that’s not the only thing we want to cater to. There are other verification […]

I wanna talk to hardware…I need Embedded Software Engineer

Hey There, It’s time – We are looking to talk to our hardware, and we need you in Bangalore (2-3 or 4-6 yrs work ex) […]

Selective Non-Default Rules Based Clock Tree Synthesis using open-source EDA

Hey There – Think about it…!! Problem Statement – For hierarchical designs ~500k instance count, participants are expected to develop code which will modify existing […]

Default-Rules Based Clock Tree Synthesis in open-source EDA

For hierarchical designs ~500k instance count, participants are expected to develop code which will build clock tree for a design which has close to ~50k sequential flip-flops using default routing rules

How about pre-route and power-grid generation in opensource EDA?

Hey There – Think about it!! Today’s version of open-source EDA tools, work very well for hierarchical designs sub-25k instance count. For hierarchical designs ~500k […]

Now that’s the beauty of open-source….

Hey There, Our team worked really hard to get Robot + MP3 player using India’s First Indegenious 32-bit RISC-V Microprocessor “Shakti E-Class”…This one is Shakti […]

Think about pre-placed cells and power ring generation in opensource EDA

Hey There – Think about it!! Today’s version of open-source EDA tools, work very well for hierarchical designs sub-25k instance count. For hierarchical designs ~500k […]

Re-define pad placement using open-source EDA

Hey There – Think about it!!! Last week, we shared our idea and vision of “How to define the width and height of core and […]

Let’s re-think open-source EDA – core and die

Hey There – Think about it!!! Today’s version of open-source EDA tools, work very well for hierarchical designs sub-25k instance count. For hierarchical designs ~500k […]

‘Made in India’ SHAKTI processor on VSDFLOW – Now that’s exciting

With learning being online, SHAKTI core and ‘vsdflow’ being opensource, this is first-time in the history of VLSI design & EDA (thanks to RISC-V ecosystem and Shakti Team at IITM lead by Prof. Kamakoti), a chip will ever be taped-out using all open source flow, which will cater to almost 80% Indian Semiconductor Market.