‘vsdflow’ on CentOS is ready

to build the shell script for ‘vsdflow’ on CentOS, and finally I have the first cut ready. You just need to follow steps given in below link for CentOS, and all opensource EDA tools (PNR, STA, Layout, LVS) will be installed on your system. There are 2 testcases (picorv32 and spi_slave) inside the below link to test whether all tools have been installed or not. After running the shell script in below link, you need run the testcase

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How about benchmarking Opensource openSTA against ——?

So, I took up two STA tools, OpenSTA from openroad project and “——-” from “——-“, to explain, to some extent, what “bench-marking” means to me. I would also encourage everyone reading this blog to come up with their definitions of “bench-marks” for other tools and we can model that. You can fill-up “——” with one of your favorite industry grade EDA tools. The concept of benchmark won’t change

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The horrible std cell ever designed by me….

Power rail discontinuity – We would like to have continuous power rail.N- and P-diffusion discontinuity – We would like to have continuous diffusion. For my Physical design friends, remember, we add “FILLER” cells at the end of routing, and you always wondered why we are doing so.Small substrate contacts – Except for inverter, all substrate contacts are single width, which will create high resistance path for current, thus increasing “Clk-to-Q” delay.Hanging metal1 – If you see for the NAND gate outputs, there is lot of hanging metal1.

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Are you ready for Embedded-UVM webinar?

Hey There, Of-course there is a requirement for open-source verification, but that’s not the only thing we want to cater to. There are other verification trends and challenges which system verilog and other verification platforms are not able to meet. So, we want to position Embedded-UVM for that In the […]

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I wanna talk to hardware…I need Embedded Software Engineer

Hey There, It’s time – We are looking to talk to our hardware, and we need you in Bangalore (2-3 or 4-6 yrs work ex) Read below very carefully, and if you think you fit, please send us email at “contactvsd@vlsisystemdesign.com”…. If you have experience Developing/Reviewing/Verification and testing maintainable, high […]

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How about pre-route and power-grid generation in opensource EDA?

Hey There – Think about it!! Today’s version of open-source EDA tools, work very well for hierarchical designs sub-25k instance count. For hierarchical designs ~500k instance count, develop code which will enable users to connect pre-placed power pins to power rings around them and generate power grid within core Inputs […]

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Now that’s the beauty of open-source….

Hey There, Our team worked really hard to get Robot + MP3 player using India’s First Indegenious 32-bit RISC-V Microprocessor “Shakti E-Class”…This one is Shakti on FPGA….Many more customer products are getting ready using Shakti processor and indigenous board, for IESA event at Leela Palace, Bangalore on 19th and 20th […]

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