What I did in 8-weeks-VSD Internship? Power Analysis Tool Using TCL

Hi There,

The task given to me was “Design of Open-source Power analysis tool – calculate average switching power and leakage power – Using TCL/Perl/Python – any language”. The entire program is divided into 4 phases.

Phase I:

In first 3 weeks, we need to find out three essential things: “What to do?”, “Why to do?” and “How to do?”. During this phase, A brief analysis on power, its classification and importance of power tools in VLSI industry is done. The application circuits such as 4-bit adder, ALU are designed in NI Multisim and later in LTSpice using osu018 pdks.

Phase II:

In this phase, the methodology of the power tool was proposed. I chose TCL language to code as it is somewhat similar to C++. A basic code from scrap is built at first. The inputs taken for this code are supply voltage (VDD), load capacitance (CL), switching frequency (f) used in circuit and it gives the calculated switching power value. The equation used for calculating switching power is

P_dynamic = 1/2 CL * Vdd^2 * F

The main challenge for me in this phase is coding in TCL language which is completely unknown to me. I have to learn it and write the code to calculate the required power values.

Phase III:

After Phase II evaluation, feedback from Kunal Ghosh helped to build up this power tool. Later, the basic idea to find average switching power and leakage power from ngspice netlist is given by Prof. Sudhakar Mande from Don Bosco Institute of Technology, Mumbai. The idea is taken from textbook CMOS digital Integrated circuits by Kang.

A separate power meter is built which gives the average power of the circuit. The integral of instantaneous supply voltage VDD and the current drawn from power meter shown in fig2 over a period for a periodic input gives the average switching power of entire circuit which acts as sub circuit in power meter.  The mathematical approach is clearly given in the textbook CMOS digital Integrated circuits by Kang.

As shown in fig3, the measured step difference in voltage across power meter over a constant time period (here 2ns) is equivalent to the average switching power. For this a new netlist is written by modifying the user given netlist.

The leakage power is calculated by using operating point (.op) analysis used in ngspice with little modifications in the user given netlist.

Phase IV:

Till phase III, manual writing is done for modification of netlists. This phase is quite challenging as it involves the automating the modifications using TCL shell scripting. At first individual codes are written for calculating switching power and leakage power, later both codes were merged.

Fewer inputs from user that related to netlist were taken such as supply node name, supply voltage value were taken to modify the user given netlist and forms new netlist. Now the new netlists are inputs to power tool. The calculation of average switching power and leakage power is done using tcl code after obtaining the data from running the new netlists using ngspice. A flow diagram is shown in fig4 for better understanding of power tool.

At this point, it seems that main goal is achieved but there is some manual operation such as running ngspice. I felt to automate this thing. Here the shell commands of TCL and great support from Philipp Gühring helped in achieving this idea

To check the compatibility of designed power tool, we took circuit netlists of other interns and calculated the power values. Even individual power tools are also checked for the compatibility.

Limitations:

Since the foundation tool for the designed power analysis tool is ngspice, the user netlist has to be compatible with the Ngspice tool.

Despite challenges and fear, we completed the 8-week internship successfully but there is a lot more work to do!


For detailed source code and flow, refer the github repo:  vsdtclpowertool.

Refer below link to know more about VSD-IAT workshops and future internships:

https://www.vlsisystemdesign.com/vsd-iat/

Registration for Ethical RISC-V IoT Workshop

Welcome to Ethical RISC-V IoT Workshop

The “Ethical RISC-V IoT Workshop” at IIIT Bangalore, organized in collaboration with VSD, is a structured, educational competition aimed at exploring real-world challenges in IoT and embedded systems. Participants progress through three stages: building an application, injecting and managing faults, and enhancing application security. The event spans from May 9 to June 15, 2024, culminating in a showcase of top innovations and an award ceremony. This hands-on hackathon emphasizes learning, testing, and securing applications in a collaborative and competitive environment.

Rules :
  1. Only for Indian Student whose college is registered under VTU
  2. Only team of 2 members can Register
  3. Use only VSDSquadron Mini resources for product development
Awards :
  1. Prize money for final 10 Team
  2. 3 Winner team’s Product will be evaluated for Incubation
  3. 7 consolation prizes
  4. Completion Certificate to final round qualifier
  5. Chance to build a Proud Secured RISC-V Platform for India

Date for Registration : 9th May - 22nd May, 2024
Hackathon Inauguration : 23rd May 2024

VSDSquadron (Educational Board)

VSDSquadron, a cutting-edge development board based on the RISC-V architecture that is fully open-source. This board presents an exceptional opportunity for individuals to learn about RISC-V and VLSI chip design utilizing only open-source tools, starting from the RTL and extending all the way to the GDSII. The possibilities for learning and advancement with this technology are limitless.

Furthermore, the RISC-V chips on these boards should be open for VLSI chip design learning, allowing you to explore PNR, standard cells, and layout design. And guess what? vsdsquadron is the perfect solution for all your needs! With its comprehensive documentation and scalable labs, thousands of students can learn and grow together.

VSD HDP (Hardware Design Program) Duration-10 Week

With VSD Hardware Design Program (VSD-HDP),  you have the opportunity to push the boundaries of what exist in open source and establish the new benchmark for tomorrow.

It will leverage your degree in Electrical or Computer Engineering to work with

  • Programmable logic
  • Analog/ digital IP
  • RISC-V
  • Architecture & microprocessors
  • ASICs and SoCs on high-density digital or RF circuit cards
  • Gain hands-on knowledge during design validation and system integration.

Sounds exciting to just get started with expert mentors, doesn’t it? But we are looking for the next generation of learners, inventors, rebels, risk takers, and pioneers.

“Spend your summer working in the future !!”

Outcomes of VSD Online Research IP Design Internship Program

  1. Job opportunities in Semiconductor Industry
  2. Research work can be submitted to VLSI International journals
  3. Participate in Semiconductor International Conference with Internship Research Work
  4. Paper Publications in IEEE Conference and SIG groups
  5. Tape out opportunity and IP Royalty
  6. Interact with world class Semiconductor designer and researchers
  7. Academic professions where more research projects are encouraged.
  8. All the above research and publication work will help colleges and institutes to improve accreditation levels.

Know More Information

VSD – Intelligent Assessment Technology (VSD-IAT)

VSD – Intelligent Assessment Technology (VSD-IAT) is expertly built training platform and is suited for designer requirements. Semiconductor companies understand the value of training automation and Engineer performance enhancement, and do not need to be convinced of the impact of a virtual platform for learning. VSD trainings are quick, relevant, and easy to access from any device at any time zone.

VSD Intern Webinars

VSD Interns made it happen !!

VSD is working towards creating innovative talent pool who are ready to develop design and products for the new tech world. VSD believes in “Learning by doing principle” , and always prepare the student to apply the knowledge learned in the workshops, webinars and courses. We always push our students to work on new designs, test it and work continuously till it becomes the best performing design. Any student who enrolls to VSD community starts working with small design and grows with us and develops a tapeout level design with complete honesty and dedication towards the Work !!

Check out VSD Interns Achievement!

VSDOpen Online Conference

Welcome to the World’s only online conference in Semiconductor Industry VSDOpen Conference. With enormous support and global presence of audience from different segments of industrial lobby and academia made a highly successful event. Evolution is change in the genetic makeup of a population over time, online conference is one kind evaluation everyone adapt soon. 

  • VSDOpen 2022 is an online conference to share open-source research with the community and promote  hardware design mostly done by the student community.
  • VSDOpen 2022 is based on the theme “How to lower the cost to learn, build, and tapeout chips ?”  , which will provide a platform to community to build stronger designs and strengthen the future of Chip design.
  • VSDOpen is envisioned to create a community based revolution in semiconductor hardware technology.
  • The open source attitude is required to bring out the talent and innovation from the community who are in remote part of world and have least access to the technologies.  And now Google support will help to bring the vision to execution by VSD team

VSD Online Course by Kunal Ghosh

VSD offers online course in complete spectrum of vlsi backend flow from RTL design, synthesis and Verification, SoC planning and design, Sign-off analysis, IP Design, CAD/EDA automation and basic UNIX/IT, Introduction to latest technology – RISC-V, Machine intelligence in EDA/CAD, VLSI Interview FAQ’s.

Current Reach – As of 2021, VSD and its partners have released 41 online VLSI courses and was successfully able to teach  ~35900 Unique students around 151 countries in 47 different languages, through its unique info-graphical and technology mediated learning methods.

Enquiry Form