Skywater130 Spec to GDS workshop details

You might have seen the above image in one form or another, in different our blogs or VSD websites. Every trapezoid in above image is a field or career in itself and each one of them has immense job and innovation opportunities. Infact, chip design is like real estate - it's ever green and never-ending. AI based EDA automation will quadruple the number of chips which will be manufactured in the next decade. Automation would need engineers to think differently, out-of-the-box and work on problem statements which were never encountered before and work fast within a certain time limit.

That's what VSD workshops prepare you for - deadline based design oriented workshops. Though, VSD has multiple courses which gives lifetime access and which is good if you want to revise fundamentals. But if you are looking to prepare yourselves for future challenges, VSD time-bound workshops are the ones you should be going for. Participants who have completed VSD-time bound workshops with a valid lab based reports, are now in top semiconductor companies all over world working in cutting edge technologies like EDA automation, neural networks, multicore processors and complex analog IP design
The question is, which workshop should be taken at what stage? Look at the above image and let me break it down below -
1) First Workshop - RISC-V based MYTH (Microprocessor for You in Thirty Hours)
Any electronic device (for eg., calculator) takes the right shape once you write specifications of that device. These specifications are then converted into proto-RTL (high level RTL in human language) and verified against specifications. Now, VSD could have taken the calculator directly as a starting point for specification, but that would have been too easy as the calculator would need just a simple ALU. So we took a processor which can be used for calculator application and various others as well (like waveform generator for eg.). And hence that's the first workshop that should be taken. We are using RISC-V based processor and hence the workshop name is RISC-V based MYTH (Microprocessors for You in Thirty Hours)
2) Second Workshop - RTL design and synthesis using Sky130

Once we have a proto-RTL, it's time to convert the RTL into digital logic gates (AND, OR, XOR, Flip Flops). But that would be as easy as running a simple 'synth' command. We would love all of you to build good RTL and not just RTL, which is what differentiates an engineer from a good engineer. This phase would need you to think logically and supply the right RTL to the synthesis engine so it produces what you want it to produce, that consumes optimum power, takes optimum area and provides high performance. These would need a surgical analysis of RTL and that's where you should go for RTL design and synthesis using Sky130 workshop. Why sky130? Why not the latest technology like 28nm or 7nm?  Of-course, we can and we will be. But currently 130 nm is the only industry grade manufacturable libraries which is available as open-source
3) Third Workshop - Circuit design and SPICE simulations using Sky130
Before we jump into Physical design/STA workshops, it's very important to know your foundry well. Like in a restaurant, you are well aware of what you are ordering, so that you have a rough idea about the taste of it, similarly, since you will be placing an order with the foundry, it's better to know what you will be receiving once the chip arrives. Just like taste is for food, inverter characteristics is for foundry. If we are able to characterize the robustness of the inverter which is provided by the foundry by characterizing the inverter against a range of stimulus, you can estimate performance of your final chip. We can do that at Circuit design and SPICE simulation using Sky130 workshop. Why Sky130? Same reason. It's available openly for us to characterize
4) Fourth Workshop - SoC/Physical design using Sky130
Ideally, we would want to call this workshop as SoC design rather than Physical design. Physical design is one of the steps in SoC design. But physical design is being branded around very well in industry, so let's call it physical design for time-being. If your interviewer is really good and knows what he is asking, then the moment you say "SoC design" rather than "Physical Design", you will catch his attention. Now to find out what is the similarity/differences between the both and do a "good" physical design rather than "just" physical design, go ahead and enroll for a Physical design workshop using OpenLANE and Sky130.
5) Fifth Workshop - Physical Verification using Sky130
Finally, once you are done with Physical design, it's time to hand-off your design to Skywater foundry for manufacturing. For that, there are certain advanced sign-off checks with metals and base layers visible. Ideally, this should have been an automated thing where GDS produced should be DRC/LVS free. To confirm if this really is the case, we need to run certain checks and we need to do this fast. Physical verification using Sky130 workshop explains such smart techniques from basics to advanced, and these checks are similar to what you would be doing using commercial tools
Very important - Note all the workshop dates before enrolling as some of them or most of them will be on the same dates. So enroll only for any one and then you can enroll for the others later. Try to identify which is your strongest area in the above 5-workshops, and which one needs work. Enroll for that workshop only and we will take care of the rest during the 5-day duration of the workshop
All the best and happy learning

Registration for Ethical RISC-V IoT Workshop

Welcome to Ethical RISC-V IoT Workshop

The “Ethical RISC-V IoT Workshop” at IIIT Bangalore, organized in collaboration with VSD, is a structured, educational competition aimed at exploring real-world challenges in IoT and embedded systems. Participants progress through three stages: building an application, injecting and managing faults, and enhancing application security. The event spans from May 9 to June 15, 2024, culminating in a showcase of top innovations and an award ceremony. This hands-on hackathon emphasizes learning, testing, and securing applications in a collaborative and competitive environment.

Rules :
  1. Only for Indian Student whose college is registered under VTU
  2. Only team of 2 members can Register
  3. Use only VSDSquadron Mini resources for product development
Awards :
  1. Prize money for final 10 Team
  2. 3 Winner team’s Product will be evaluated for Incubation
  3. 7 consolation prizes
  4. Completion Certificate to final round qualifier
  5. Chance to build a Proud Secured RISC-V Platform for India

Date for Registration : 9th May - 22nd May, 2024
Hackathon Inauguration : 23rd May 2024

VSDSquadron (Educational Board)

VSDSquadron, a cutting-edge development board based on the RISC-V architecture that is fully open-source. This board presents an exceptional opportunity for individuals to learn about RISC-V and VLSI chip design utilizing only open-source tools, starting from the RTL and extending all the way to the GDSII. The possibilities for learning and advancement with this technology are limitless.

Furthermore, the RISC-V chips on these boards should be open for VLSI chip design learning, allowing you to explore PNR, standard cells, and layout design. And guess what? vsdsquadron is the perfect solution for all your needs! With its comprehensive documentation and scalable labs, thousands of students can learn and grow together.

VSD HDP (Hardware Design Program) Duration-10 Week

With VSD Hardware Design Program (VSD-HDP),  you have the opportunity to push the boundaries of what exist in open source and establish the new benchmark for tomorrow.

It will leverage your degree in Electrical or Computer Engineering to work with

  • Programmable logic
  • Analog/ digital IP
  • RISC-V
  • Architecture & microprocessors
  • ASICs and SoCs on high-density digital or RF circuit cards
  • Gain hands-on knowledge during design validation and system integration.

Sounds exciting to just get started with expert mentors, doesn’t it? But we are looking for the next generation of learners, inventors, rebels, risk takers, and pioneers.

“Spend your summer working in the future !!”

Outcomes of VSD Online Research IP Design Internship Program

  1. Job opportunities in Semiconductor Industry
  2. Research work can be submitted to VLSI International journals
  3. Participate in Semiconductor International Conference with Internship Research Work
  4. Paper Publications in IEEE Conference and SIG groups
  5. Tape out opportunity and IP Royalty
  6. Interact with world class Semiconductor designer and researchers
  7. Academic professions where more research projects are encouraged.
  8. All the above research and publication work will help colleges and institutes to improve accreditation levels.

Know More Information

VSD – Intelligent Assessment Technology (VSD-IAT)

VSD – Intelligent Assessment Technology (VSD-IAT) is expertly built training platform and is suited for designer requirements. Semiconductor companies understand the value of training automation and Engineer performance enhancement, and do not need to be convinced of the impact of a virtual platform for learning. VSD trainings are quick, relevant, and easy to access from any device at any time zone.

VSD Intern Webinars

VSD Interns made it happen !!

VSD is working towards creating innovative talent pool who are ready to develop design and products for the new tech world. VSD believes in “Learning by doing principle” , and always prepare the student to apply the knowledge learned in the workshops, webinars and courses. We always push our students to work on new designs, test it and work continuously till it becomes the best performing design. Any student who enrolls to VSD community starts working with small design and grows with us and develops a tapeout level design with complete honesty and dedication towards the Work !!

Check out VSD Interns Achievement!

VSDOpen Online Conference

Welcome to the World’s only online conference in Semiconductor Industry VSDOpen Conference. With enormous support and global presence of audience from different segments of industrial lobby and academia made a highly successful event. Evolution is change in the genetic makeup of a population over time, online conference is one kind evaluation everyone adapt soon. 

  • VSDOpen 2022 is an online conference to share open-source research with the community and promote  hardware design mostly done by the student community.
  • VSDOpen 2022 is based on the theme “How to lower the cost to learn, build, and tapeout chips ?”  , which will provide a platform to community to build stronger designs and strengthen the future of Chip design.
  • VSDOpen is envisioned to create a community based revolution in semiconductor hardware technology.
  • The open source attitude is required to bring out the talent and innovation from the community who are in remote part of world and have least access to the technologies.  And now Google support will help to bring the vision to execution by VSD team

VSD Online Course by Kunal Ghosh

VSD offers online course in complete spectrum of vlsi backend flow from RTL design, synthesis and Verification, SoC planning and design, Sign-off analysis, IP Design, CAD/EDA automation and basic UNIX/IT, Introduction to latest technology – RISC-V, Machine intelligence in EDA/CAD, VLSI Interview FAQ’s.

Current Reach – As of 2021, VSD and its partners have released 41 online VLSI courses and was successfully able to teach  ~35900 Unique students around 151 countries in 47 different languages, through its unique info-graphical and technology mediated learning methods.

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