– Encyclopedia to begin the Hackathon

OpenCores is a community developing digital open-source hardware through electronic design automation (EDA. OpenCores hopes to eliminate redundant design work and slash development costs. A few companies have been reported as adopting OpenCores IP in chips, or as adjuncts to EDA tools. OpenCores is also cited from time to time in the electronics press as an example of open source in the electronics hardware community.

The OpenCores portal hosts the source code for different digital projects and supports the users’ community providing a platform for listing, presenting, and managing such projects; together with version control systems for sources management.

OpenCores is also the place where digital designers meet to showcase, promote, and talk about their passion and work.

The best part of OpenCores is that the languages are popular to build the projects used ones like Verilog, SystemVerilog, VHDL, SystemC, BlueSpec, etc which increases the scope of reusability of the designs.


The components produced by the OpenCores initiative use several different software licences. The most common is the GNU LGPL, which states that any modifications to a component must be shared with the community, while one can still use it together with proprietary components. The less restrictive 3-clause BSD licence is also used in some hardware projects, while the GNU GPL is often used for software components, such as models and firmware. So, anyone can use the projects available at OpenCores free of cost.

 Projects Under the OpenCores

  1.     Arithmetic Core

The projects under this category include various Arithmetic related operations. The projects consist of the multipliers, FFTs, various algorithms like AES, CRC, different pipelining strategies, and many more.Most of the projects are under LGPL licensing while a few are BSD, GPL, etc.

  1.     Prototype Board

These include various varieties of projects based on the FPGA boards. Some of the board prototypes developed under this category include ZTEX USB-FPGA Module, STT MTJ, Spartan 6, OCRP, OMRP, arduFPGA and many more exciting boards.

  1.     Communication Controller

Projects based on communication protocols come under this heading.Few projects to be listed are Ethernet, APB, I2C, APB to SPI, JTAG Master-Slave, UART-SPI and many more.

  1.     DSP Core, ECC Core, Memory Core

We have different designs, architectures based on the development of the core processors, some even dedicated to an application. These projects consist of various pipelining designs, architectures, FFT methods, Error correcting cores including various Encoders/Decoders, RAM memories, DDR2, DDR3 processors, Wishbone controllers and many other complicated designs.

  1.     Processor, Co-processor

Various processors, co-processors, micro-controllers, etc come under this category.Designs of RISC-V based cores, AVRtinyX61core, 16-bit Microcontroller, 8051 core, GPU, ZPU (the world’s smallest 32-bit CPU with GCC toolchain), 8080 compatible processors, Graphics Accelerator, FPU, etc can be found here. This category provides a base for students/researchers/start-ups to explore and develop their own processor!!!

  1.     System on Chip/System on Module

These mainly consist of SoC projects where all the components are present in a single integrated circuit.  Exciting designs are AHB DMA, NoC(Network on Chip) designs, Wishbone Cores, Z80 SoC, RISC-V based SoCs, System on Module ARM9 and many more.

  1.     Video Controller

These include the projects basically dealing with the display. Interesting projects like VGA, HDMI, Video Starter Kit, LCD Controllers, graphics controllers, PAL/NTSC encoder, and many more. 

  1.     Libraries, Testing Verification

This category has a variety of libraries which can be downloaded for free and used for Verification purposes. Funbase IP library, TTL Library, Robot Control Library, Library of common functions, Library of commonly used components, constrained random test generator, Bus Transaction Monitor with JTAG and many more such libraries and testbenches are available which the researches/companies can make use of directly instead of building them from scratch. These are even useful to those who are new to designing and/or verification.

  1.     Others, Uncategorized

These include various interdisciplinary designs like 16x4 LCD Controller, Oscilloscope, PWM Audio Controllers, FM Transmitter hack, etc. This category is very good for the beginners/young researchers as it also includes basic interesting and innovative projects like PWM, Keypad scanner CRC generators, Sudoku Solver etc.

Let’s investigate one of the projects, the Vedic multiplier under the Arithmetic Category:

An Example project – A Vedic Multiplier 

The design is made in the pure Verilog Language. It is an 8 bit Multiplier.

The design comprises of the following modules from top to bottom:

  • vedic8x8
  • vedic4x4
  • vedic2x2
  • ripple_adder_12bit
  • ripple_adder_8bit
  • ripple_adder_6bit
  • ripple_adder_4bit
  • full_adder
  • half_adder

The modules at the bottom are instantiated and connected to build the top-level module.

The following is the code of topmost module vedic8x8:

Here is the simple test-bench for verifying the design under test(vedic8x8):

We can see that the above test-bench is written in Verilog.

But, there is another way of developing the testbench using the Python based environment cocotb (COroutine based COsimulation TestBench). As we all know it is easy to code in Python, therefore this framework makes the verification seamless.

For the upcoming Capture The Bug Hackathon, one is free to choose any Verilog Open Source design from any website/reference  similar to that of OpenCores with appropriate licensing which is compatible with Icarus Verilog and also the Verilog code needs to be synthesizable.

Happy Verification!!!

Register Now -

Looking forward to all your participation!!!

Posted in Conference, Design, Open Source, Shakti Processor, Tool related, VSD Hackathon.

Leave a Reply

Your email address will not be published. Required fields are marked *