Generated clock & master clock.. Let’s make it simple – Part 2
hello Based on the responses of previous post of Generated clock & master clock … Let’s make it simple!! – Part 1, I am very […]
hello Based on the responses of previous post of Generated clock & master clock … Let’s make it simple!! – Part 1, I am very […]
Hello I get this one occasionally … not particularly about the concept, but about the ways we can create a generated clock definition. Too many […]
Hello You guessed it right. I am referring to ‘fabless’ model of semiconductor business… Here I am referring to one of my post, which had […]
hello I have been traveling last few days to Silicon Valley, San Jose US and would love to say, I have some real good news […]
Hello Of course …. The biggest cost that I am mentioning about is the fab cost and that’s my biggest challenge to build better chips. […]
Hello For those who have been in sync with my course on Static timing analysis, will already know this topic very well. For those who […]
Hello Now that we know what a timing graph is, let me unveil actual arrival time (AAT), required arrival time (RAT) and slack. We have […]
Hello This is like the ‘Batman’ of static timing analysis. We have heard stories about it but never seen it. The reasons, this comes more […]
Hello Let me start with a quote “Competition is always a good thing. It forces us to do our best. A monopoly renders people complacent […]
Hello Japanese stood to be the world leaders during 1980-1990 regime in semiconductor manufacturing [2]. During my research, I found that Japanese semiconductor firms are […]