Some real good news for designers registered in my courses!!
hello I have been traveling last few days to Silicon Valley, San Jose US and would love to say, I have some real good news […]
hello I have been traveling last few days to Silicon Valley, San Jose US and would love to say, I have some real good news […]
Hello Of course …. The biggest cost that I am mentioning about is the fab cost and that’s my biggest challenge to build better chips. […]
Hello For those who have been in sync with my course on Static timing analysis, will already know this topic very well. For those who […]
Hello Now that we know what a timing graph is, let me unveil actual arrival time (AAT), required arrival time (RAT) and slack. We have […]
Hello This is like the ‘Batman’ of static timing analysis. We have heard stories about it but never seen it. The reasons, this comes more […]
Hello Let me start with a quote “Competition is always a good thing. It forces us to do our best. A monopoly renders people complacent […]
Hello Japanese stood to be the world leaders during 1980-1990 regime in semiconductor manufacturing [2]. During my research, I found that Japanese semiconductor firms are […]
Hello – In my last post, I was very happy about the robustness of CMOS logic. And here’s more reason to be happy to discover what […]
Hello It’s so robust… I can give you 4 instances of this 1) Vary PMOS width size to its maximum, keeping NMOS width constant and […]
Hello We were looking for a solution for below scenario, and you will be amazed to see, how an ‘Universal Gate’ solves the below problem […]