‘vsdflow’ on CentOS is ready

to build the shell script for ‘vsdflow’ on CentOS, and finally I have the first cut ready. You just need to follow steps given in below link for CentOS, and all opensource EDA tools (PNR, STA, Layout, LVS) will be installed on your system. There are 2 testcases (picorv32 and spi_slave) inside the below link to test whether all tools have been installed or not. After running the shell script in below link, you need run the testcase

Continue reading

Rapid Physical IC Implementation

“Rapid Physical IC Implementation and Integration using Efabless Platform”. This paper describe a rapid backend process flow (synthesis, placement, STA, routing) and top level integration to implement a small RTL IP into a tapeout ready chip using the Efabless online platform

Continue reading

Committed in 2011, delivered in 2018

the flowchart is what you need to understand just to be an expert in the field of VLSI and semiconductors. Every topic shown in above image is a field, and every topic has a beautiful physics behind it, which when blended with tools in a video course, becomes a master-piece

Continue reading

Bottoms up – From STA to RISC-V architecture

In on opensource RISC-V implementation flow, you move from right (Hardware) to Left (application program), and then coming from left, if you stop at middle (RISC-V ISA), that’s when you start thinking about this architecture from all angles, like sta, drc, congestion, clock skew, io latency, static and dynamic power, IR and many more

Continue reading

meet our technology partners

Hi Glad to have a prestigious institution (University of Illinois) and a market leader in Library characterization/modelling (Paripath) as our technology partners. For more, read […]

Continue reading