After 9-years of extensive research on VLSI students learning patterns and multiple 5-days workshop with students and professionals all over world, below image displays 6 critical components of a remarkably successful VSD workshop. I am measuring success in terms of placements, interviews, fundamentals revision and job changes by professionals.
Finally, it is out – VSD has its own internship program with loads of fun learning and career growth. The day, like 4 years back, when we had sketched below idea, now seems to be a reality.
Trust me – KNOWLEDGE TRANSFER to students is MOST SATISFYING feeling.
The key thing over here – It must be short and crisp so everyone can enjoy the topic. These are memorable times, where everyone needs to do their bit to fight a battle against an unknown enemy. You need not make new slides, you are free to present your personal/company slides, provided it’s available on public platform.
NPTEL presents you this fantastic opportunity to interact with Industry Expert Mr. Kunal P Ghosh, Director, and co-founder of VLSI System Design (VSD) Corp. Pvt. Ltd. on 07th March 2020 at 6 PM over a live session on topic – Transforming the Silicon Industry Through Open-Source.
As per huge request from students and working professionals from all over places, VSD is conducting another “VLSI SoC design workshop using open-source EDA tools” from 19th-23rd February, which has only 1-working day, and rest all are holidays. Below link has detailshttps://www.vlsisystemdesign.com/upcoming-event/
Talk by Puneet Goel on ” Embedded UVM – Enabling Multicore Test benches”
Talk by Steve Hoover on “Unleashing Open Source Silicon”
Open-Source Silicon – What’s holding us back?
why they are so important
what they lack
our solution — 1st CLaaS
VSOpen 2019 Demo 3: BOOM: The Berkeley Out-of-Order Machine by Berkeley University. Superscalar RISC-V OoO core
Fully integrated in Rocket Chip ecosystem, ~18K LoC of open-source Chisel, Parameterizable generator
VSDOpen 2019 Demo 2 : The PULP project in 15 minutes Serious open source hardware for everyone
Frank K. Gürkaynak, ETH Zürich
The Raven chip: First-time silicon success with Qflow and Efabless Raven is a open-source top-level SoC design based […]