VSDBabySoC delivered under VSD-HDP Intern
Mohammad joined VSD as a part of 8-week Hardware Design Program (HDP), which is specially designed for anyone looking to reach utmost level of VLSI from scratch.
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Chip Tape-out – Not a dream anymore – VSD students prove it again
From nothing to Tapeout Ready basic designs – These 7 students have seen it all. Congratulations to all of them. Great start to their semiconductor career.
Here’s the link with their design details-
VSD delivered 1st online analog tapeout workshop using Sky130
VSD promises to deliver similar IP design workshops in upcoming days, followed by the next big leap – SoC design workshop with VSD SoC generator using all VSD IPs developed by VSD community using Skywater 130 nm technology node.
“What I did in the 5-day Advanced Physical Design workshop?” – Experiencing the “freedom within expanding boundaries”
I have been tracking opensource tools in backend flow and also VSD’s online programs like MYTH, Digital System Design, Modelling using Verilog etc. In the […]
What I did in 8-weeks-VSD Internship? On-chip PLL using Sky130
In this 8-week internship I spent the first week on researching existing work and making design decisions for the PLL components namely – Phase Frequency Detector, Charge Pump, Voltage Controlled Oscillator and Frequency Divider. I also looked into linking of the Sky130nm PDK with SPICE for the circuit implementation.
What can I do in 5-day VSD Workshop? Learn TL-Verilog and RISC-V
RISC-V and open-source hardware is undoubtedly destined to change the industry. Not just for the ISA and design, there are ongoing efforts to tape out an actual chip with completely open-source tools!
Join the revolution!
What I did in 5-day VSD – Workshop? Designed basic RISC-V core
A few months back, I came across a workshop titled ‘RISC-V based Microprocessor for You in Thirty Hours (MYTH)’, that was about designing RISC-V core […]
What I did in 8-weeks-VSD Internship? – Open Source Power Analysis Tool Using Python
Power analysis has materialized as a principal theme in today’s world in semiconductor industries. As very large scale integrated circuit (VLSI) are far beyond from human ability because of complexity in nature. So to analyse power in these circuits we use open source computer aided tools, plenty of tools are available but most of them are costly. I designed an open source power analysis tool for the academic use. This tool gives out values of average and leakage power of any circuit by just giving the netlist of circuit file along with name of supply voltage as input. This tool is designed in python language.
What I did in 8-weeks-VSD Internship? Power Analysis Tool Using TCL
The task given to me was “Design of Open-source Power analysis tool – calculate average switching power and leakage power – Using TCL/Perl/Python – any language”. The entire program is divided into 4 phases.
What I did in 8-weeks-VSD Internship- 10-Bit Digital to Analog Converter using osu180nm
This research internship program was for eight weeks with a sequential six-staged format. My assigned objective was to design a 10-Bit Digital to Analog Converter using osu180nm tech node and open-source EDA tools.
