Rapid Physical IC Implementation

“Rapid Physical IC Implementation and Integration using Efabless Platform”. This paper describe a rapid backend process flow (synthesis, placement, STA, routing) and top level integration to implement a small RTL IP into a tapeout ready chip using the Efabless online platform

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Use this tool for PNR – Its FREE

If you learn this tool and use it to build your own applications, you might end up presenting a paper in our online conference happening soon called “VSDOpen” – The first ever online conference on opensource EDA.

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Maze Routing – Lee’s Algorithm

Lee’s Algorithm guarantees there is exists a valid path and it’s the shortest path.

But, this algorithm is too time and memory consuming, To overcome, these short-comings, there are other more advanced algorithms like Line search Algorithm, Steiner Algorithms, etc.

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