On-Chip Variation (OCV) – Part 4
Hello And, finally, we have a video on what we posted on this topic. Below is the snippet of the same. Full video can be […]
Hello And, finally, we have a video on what we posted on this topic. Below is the snippet of the same. Full video can be […]
Hello, The below image models “low-to-high waveform condition” at input of CMOS inverter, in terms of resistances and capacitance. So, overall, its the RC time […]
Hello Today, I was a guest speaker at one of the biggest Technical Conference held in Bangalore, and luckily I met few people who had […]
Hello Ever thought what’s an interviewer’s favorite questions to rip you off – all of my previous post :). And On-Chip Variation (OCV) is one […]
Hello After my last post on “Regular buffer v/s Clock buffer – Part 2“, I received several mails on having a video of the post. […]
Hello I feel lucky and blessed, after my last post on “Regular buffer v/s Clock buffer – Part 1“, as I received couple of emails, […]
Hello, Everyone, who’s been a part of physical design or STA, must have definitely gone through this. When I thought about it, like 5 years […]
Hello, This is in continuation to the previous post, where I explained about transistor level implementation of negative and positive latch. In this post, I […]
Hello, I have been receiving multiple queries on what is clk-to-q delay, how’s it different from library setup time and library hold time, etc. I […]
Hello, I realized last night, that I was celebrating my work anniversary. Thanks Linkedin for reminding me that :). And, thought, let’s celebrate this one […]