VSD is happy to announce that Mohammad Amin completed project VSDBabySoC the smallest SoC in VLSI Industry. Mohammad A. Nili has completed his study in field of Computer Architecture and Design and received his B.S. degree in 2016. His main interests are computer architecture, physical design, and EDA tool design. He has a good knowledge about open-source EDA tools and flows (e.g. OpenLANE).
Mohammad joined VSD as a part of 8-week Hardware Design Program (HDP), which is specially designed for anyone looking to reach utmost level of VLSI (which is tapeout) from scratch. When Mohammad joined, he was pretty novice and fresher in semiconductors, trying to figure out complex problem statements. But now, after 8-weeks of HDP, I must say he can be easily compared to an experienced VLSI professional. Why? In span of 8-weeks, not only did he got trained in VLSI, but also developed VSDBabySoC which comprises of avsdPLL, avsdDAC and small RISC-V core.
Mixed signal flow is something where opensource tools needs some amount of work, and Mohammad was given the task to fix the mixed-signal flow in just 8-weeks along with VLSI training and research. His work on VSDBabaySoC is now a reference design for all mixed-signal projects using opensource or commercial tools, for training and hackathon purposes
Special Thanks to Shivani Shah from IIIT Bangalore and Steve Hoover from Redwood EDA for his support on RISC-V core rvmyth. Shivani and Steve have been a long time partner with VSD and their creative techniques of building tools has been helping students worldwide, now Iran
One unique thing about VSDBabySoC is - the RISC-V core is build by students, avsdPLL is build by students and avsdDAC is also build by students. I must say this is real democratization in VLSI and Semiconductors - for the student, of the student, by the student.
Here's VSDBabySoC GitHub Repo. You will be amazed by the quality of work done by Mohammad (especially considering the fact that he barely knew VLSI or RISC-V when he joined)