Skywater130 Spec to GDS workshop details
You might have seen the above image in one form or another, in different our blogs or VSD websites. Every trapezoid in above image is […]
Tag Archives: Sky130
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Chip Tape-out – Not a dream anymore – VSD students prove it again
From nothing to Tapeout Ready basic designs – These 7 students have seen it all. Congratulations to all of them. Great start to their semiconductor career.
Here’s the link with their design details-
Foundry IP’s vs Macros – 10years to solve this query
A great one – not only for VSD, but also for entire VSD community. The journey has just begun, in nutshell, below image shows a well-designed VLSI Skilling model (VSD Workshops + VSD-IP design Internship + Tapeout[working on it]), which is not just participants driven but also silicon proven. To summarize, given a problem statement, VSD Interns and participants, who have gone through this rigorous training and designing model will have much better ways to figure out solutions by themselves.
150+ students have decided to upskill in VLSI
And that’s where VSD must play an especially important role to bring in latest and greatest VLSI skills to you, atleast in the field of open-source hardware. VSD owes a lot to VLSI community and hence has planned 3 exclusive cloud lab-based VLSI workshops on 3 important topics, with top 3 expert instructors from around globe, having more than 2 decades of experience – Tim Edwards, Steve Hoover, and Prof. Mohamed Shalan
Open-source EDA tool development with lab exercises using Sky130 pdk’s by Google/Skywater
RISC-V micro-architecture using transaction level – Verilog with lab exercises on Makerchip Platform
SoC and Physical Design using Automated RTL2GDS OpenLANE tool with lab exercises using demo design and Sky130 pdk’s.
