PNR – VLSI System Design

Ever heard of Chip Design Pentagon?

Know what Pentagon is? It is a plane figure which has 5-straight sides and 5-angles. For a perfect pentagon, it needs all its sides and angles to be the same, till the last decimal. Do you know what is the similarity between pentagon and our upcoming workshop “Advanced Physical Design workshop using OpenLANE/SKY130”? Look above image and you would guess it right. It is a perfect blend of topics where even a fresher can jump-start his/her career in chip design in just 5-days

Mixed-signal PNR flow using openlane/sky130nm process

GitHub is the new Resume for VLSI industry

‘vsdflow’ on CentOS is ready

to build the shell script for ‘vsdflow’ on CentOS, and finally I have the first cut ready. You just need to follow steps given in below link for CentOS, and all opensource EDA tools (PNR, STA, Layout, LVS) will be installed on your system. There are 2 testcases (picorv32 and spi_slave) inside the below link to test whether all tools have been installed or not. After running the shell script in below link, you need run the testcase

Symposium IV – Place and route of digital IC’s for best PPA

A good takeaway from above is which is the best flow – Well, there is no single answer to this. You can use “flow 1”, if your organization is constrained by cost and comparable performance, and you can go for “flow 2” if performance is the criteria.

Wanna fix DRC notch violations? There you go…

DRC is something which (most likely) is supposed to fail in first instance. Let’s see what you do to fix them. In below eg. drc count is 25. Qrouter (an open-source router, which will be discussed in detail in webinar) is really good with some standard cell sets like the one which comes distributed with qflow, like OSU018, they are really nice one’s to work with. All the ports have nice squares, they don’t have these inside ‘L’ corners as shown below.

Listen from CEO/architect himself on Machine learning

This webinar will talk about how do you do that using Machine Learning and Deep Learning techniques. Participants for this webinar range from students to some of service company India head and Program managers. So we will cover from basics to advanced + labs on cloud.

Tag Archives: PNR

Mixed-signal PNR flow using openlane/sky130nm process

Wanna fix DRC notch violations? There you go…

Listen from CEO/architect himself on Machine learning

meet our technology partners

VIVO – A Popular CCS noise model to find delay change

About me….

Timing libraries – This is where body and soul meets…!!

VSDSquadron (Educational Board)

VSD HDP (Hardware Design Program) Duration-10 Week

VSD – Intelligent Assessment Technology (VSD-IAT)

VSD Intern Webinars

VSD Interns made it happen !!

VSDOpen Online Conference

VSD Online Course by Kunal Ghosh

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