set_multi_cpu_usage -localCpu 8

Looks like a very popular EDA command, isn’t it? Yes, it is. Well, this command actually is just an interface for users. At the back-end, there is a C++14 code which gets executed and runs multi threading timing analysis. I know this, because I have been actively taking workshops and webinars on timing analysis
I have been criticized of not using Industry Standard Tools in my courses. I agree I do not have the tool. But I can create an interface, which gives a similar “feel and look” of commands used in industry standard EDA tools. And the good news is, you can build this too..
Have a look at below “set_multi_cpu_usage” command script, which pretty much maps to an internal Opentimer command (Opentimer is an open source STA engine)
What you can learn from above is that how various options and switches are included as a part of your command. Now in the above case, let’s say, set_multi_cpu_usage has 2 switches, 1) to provide number of threads 2) a ‘help’ command explaining the usage – These are pretty standard switches you would see in any set_multi_cpu_usage command in a standard EDA tool
We will pass both options to the command proc shown above and see how it gets resolved using tcl interface. When you type the command “set_multi_cpu_usage -localCpu 8 -help”, the expectation is to set local number of threads to 8 and print the usage of the command as well
This is how it works. First set default values for the options:
array set options {-localCpu <num_of_threads> -help “”}
Then enter a loop that processes the arguments, if there are any (left).
while {[llength $args]} {
During each iteration, look at the first element in the argument list:
switch -glob — [lindex $args 0] {
String-match (“glob”) matching is used to make it possible to have abbreviated option names.
If a value option is found, use l assign to copy the value to the corresponding member of the options array and to remove the first two elements in the argument list.
-localCpu   {set args [lassign $args – options(-localCpu)]}
The last “puts” command will dump the Opentimer Command “set_num_threads 8”. This will get passed to Opentimer, and Opentimer will take it from here
Follow the same strategy as above, and the next args “-help” will print the usage of “set_multi_cpu_usage” command as shown below. Below image also shows the current status of all variables and flags used in this interface:

Wasn’t that pretty easy – Yes it was. It’s not me who’s saying this, but it’s coming from students who have completed the TCL programming Part 1 and 2 course, which covers commands like read_lib, read_sdc, read_verilog
Coming back to the criticism – I do not use Industry Standard Tools in my course – I would say, it’s just a mind-set, as you now know how the commands are built and what to do once you get hold of the tool. This is what I call “Freedom”. Freedom to use your own tools, freedom to create your own commands, infact build better ones.
The only way to deal with an unfree world is to become so absolutely free that your very existence is an act of rebellion” – Albert Camus
Thank you and happy learning..

Registration for Ethical RISC-V IoT Workshop

Welcome to Ethical RISC-V IoT Workshop

The “Ethical RISC-V IoT Workshop” at IIIT Bangalore, organized in collaboration with VSD, is a structured, educational competition aimed at exploring real-world challenges in IoT and embedded systems. Participants progress through three stages: building an application, injecting and managing faults, and enhancing application security. The event spans from May 9 to June 15, 2024, culminating in a showcase of top innovations and an award ceremony. This hands-on hackathon emphasizes learning, testing, and securing applications in a collaborative and competitive environment.

Rules :
  1. Only for Indian Student whose college is registered under VTU
  2. Only team of 2 members can Register
  3. Use only VSDSquadron Mini resources for product development
Awards :
  1. Prize money for final 10 Team
  2. 3 Winner team’s Product will be evaluated for Incubation
  3. 7 consolation prizes
  4. Completion Certificate to final round qualifier
  5. Chance to build a Proud Secured RISC-V Platform for India

Date for Registration : 9th May - 22nd May, 2024
Hackathon Inauguration : 23rd May 2024

VSDSquadron (Educational Board)

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Furthermore, the RISC-V chips on these boards should be open for VLSI chip design learning, allowing you to explore PNR, standard cells, and layout design. And guess what? vsdsquadron is the perfect solution for all your needs! With its comprehensive documentation and scalable labs, thousands of students can learn and grow together.

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With VSD Hardware Design Program (VSD-HDP),  you have the opportunity to push the boundaries of what exist in open source and establish the new benchmark for tomorrow.

It will leverage your degree in Electrical or Computer Engineering to work with

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  • Analog/ digital IP
  • RISC-V
  • Architecture & microprocessors
  • ASICs and SoCs on high-density digital or RF circuit cards
  • Gain hands-on knowledge during design validation and system integration.

Sounds exciting to just get started with expert mentors, doesn’t it? But we are looking for the next generation of learners, inventors, rebels, risk takers, and pioneers.

“Spend your summer working in the future !!”

Outcomes of VSD Online Research IP Design Internship Program

  1. Job opportunities in Semiconductor Industry
  2. Research work can be submitted to VLSI International journals
  3. Participate in Semiconductor International Conference with Internship Research Work
  4. Paper Publications in IEEE Conference and SIG groups
  5. Tape out opportunity and IP Royalty
  6. Interact with world class Semiconductor designer and researchers
  7. Academic professions where more research projects are encouraged.
  8. All the above research and publication work will help colleges and institutes to improve accreditation levels.

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VSD – Intelligent Assessment Technology (VSD-IAT)

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VSD Interns made it happen !!

VSD is working towards creating innovative talent pool who are ready to develop design and products for the new tech world. VSD believes in “Learning by doing principle” , and always prepare the student to apply the knowledge learned in the workshops, webinars and courses. We always push our students to work on new designs, test it and work continuously till it becomes the best performing design. Any student who enrolls to VSD community starts working with small design and grows with us and develops a tapeout level design with complete honesty and dedication towards the Work !!

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VSDOpen Online Conference

Welcome to the World’s only online conference in Semiconductor Industry VSDOpen Conference. With enormous support and global presence of audience from different segments of industrial lobby and academia made a highly successful event. Evolution is change in the genetic makeup of a population over time, online conference is one kind evaluation everyone adapt soon. 

  • VSDOpen 2022 is an online conference to share open-source research with the community and promote  hardware design mostly done by the student community.
  • VSDOpen 2022 is based on the theme “How to lower the cost to learn, build, and tapeout chips ?”  , which will provide a platform to community to build stronger designs and strengthen the future of Chip design.
  • VSDOpen is envisioned to create a community based revolution in semiconductor hardware technology.
  • The open source attitude is required to bring out the talent and innovation from the community who are in remote part of world and have least access to the technologies.  And now Google support will help to bring the vision to execution by VSD team

VSD Online Course by Kunal Ghosh

VSD offers online course in complete spectrum of vlsi backend flow from RTL design, synthesis and Verification, SoC planning and design, Sign-off analysis, IP Design, CAD/EDA automation and basic UNIX/IT, Introduction to latest technology – RISC-V, Machine intelligence in EDA/CAD, VLSI Interview FAQ’s.

Current Reach – As of 2021, VSD and its partners have released 41 online VLSI courses and was successfully able to teach  ~35900 Unique students around 151 countries in 47 different languages, through its unique info-graphical and technology mediated learning methods.

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