Blogs Old - Page 9 of 28 - VLSI System Design

7th mile-stone in open-source analog IP design – 10-bit DAC

Ashutosh had joined our VSD Research IP design internship group 8-weeks back, along with 30 other interns. His journey on was from “I can’t, its too difficult” to “I did it”. Personally, only I know how hard it was for him when he saw an industry grade 10-bit DAC specifications on VSD IP website. We managed to achieve post-layout DNL of 3.5LSB and INL of 3.7LSB, which as per experience, is really tough for a fresher to achieve in a span of 8-weeks, but not impossible.

6th mile-stone in field of open-source – FREE VLSI tool installation course

A full-fledged video lectures on step-by-step process to install OpenLANE EDA tool chain and Sky130 PDK open-process on your own laptop, from scratch. There is a dependency on vsdflow, though for fresh users and with Windows or fresh Unix machines. To do something like this, it needs a clear focus on end vision, with very good VLSI fundamentals, which demands hours of efforts every day

5th mile-stone in field of open-source – another compact SRAM

This time its @Reuel did a pretty great job of building a pretty compact 6T-SRAM cell and he is just a third year engineering student

4th mile-stone – 35 RISC-V cores in 5-days – Can you believe it?

We had Makerchip IDE, TL-Verilog, Day wise Slack channels, Classroom GitHub and VSD-IAT – All of them so seamlessly integrated that every participant followed the loop and there you go. Out of 110 participants, 35 participants built entire basic RISC-V CPU core which is close to 30% participants, and all in 5-days

3rd mile-stone in 1-week in field of open-source – 4kB SRAM design

@Yash joined our research project group under VSD Research internship program which runs for 8-weeks. He was supposed to explore openRAM memory compiler flow, develop all custom cells required by openRAM using OSU180nm and generate 4kB SRAM with an access time of 2.5ns

2nd mile-stone in field open-source (open-lane EDA + Google/Sky130)

@Nickson joined our research project group under VSD Research internship program which runs for 8-weeks. He was supposed to develop flow for standard cell design and characterization using all open-source tools – magic/ngspice, then plug those standard cells into open-source PNR flow by open-lane, and benchmark RTL2GDS flow results. This needed a knowledge, not only of PNR, but device physics, custom layout, DRC/LVS and then (finally) Physical design/STA.

Mixed-signal PNR flow using openlane/sky130nm process

GitHub is the new Resume for VLSI industry

VSD is now “Intelligent VSD”

After 9-years of extensive research on VLSI students learning patterns and multiple 5-days workshop with students and professionals all over world, below image displays 6 critical components of a remarkably successful VSD workshop. I am measuring success in terms of placements, interviews, fundamentals revision and job changes by professionals.

Opensource IP Bank – That is OUR internship program

Finally, it is out – VSD has its own internship program with loads of fun learning and career growth. The day, like 4 years back, when we had sketched below idea, now seems to be a reality.

Let Knowledge Win

Trust me – KNOWLEDGE TRANSFER to students is MOST SATISFYING feeling.

The key thing over here – It must be short and crisp so everyone can enjoy the topic. These are memorable times, where everyone needs to do their bit to fight a battle against an unknown enemy. You need not make new slides, you are free to present your personal/company slides, provided it’s available on public platform.