Paper 3: Coverage Driven Functional Verification on RISC-V Cores

Paul GeorgeProject Associate IIT MAdrasB.TechShiv Nadar University ,working on Computer Architecture Design and Design Verification.

Anmol Sahoo Project Staff with Shakti. Mechanical engineer from BITS PilaniGoa Campus, really into computer architecture.

Lavanya JProject Officer with SHAKTI Group, IIT Madras. Completed MS at IITM and worked in the industry as verification engineer for 7 years.

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Posted in Concepts, Conference, RISC-V, VSDOpen 2018 Conference papers.

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