Today, VSD is again super proud of MeiTY, Govt. of India and the entire team of Shri @Rajeev Chandrashekhar Ji, Shri @Madan Mohan Ji, for supporting us in all possible ways to finally launch the most awaited hackathon till now – “Catch the Bug: A Design Verification Hackathon” – and
find the registration link https://nielithackathon.in/
Let me begin by Thanking our partners @Lavanya from @Vyoma Systems, without whom, this hackathon would have been nearly impossible to organize
Vyoma Systems and VSD started planning this event about 6-months back and we were so lucky to learn about Semicon India 2022 event, where we met @Nanda, @Jayraj and @Sreejesh @NIELIT, Calicut who trusted our vision and graciously accepted to launch this hackathon at PAN India level along with @Kamakoti Sir from @IIT Madras
The Indian Govt initiative Chips to Startup (C2S) aims to propel innovation, build domestic capacities to ensure hardware sovereignty, and build a Semiconductor Ecosystem that requires 85,000+ highly trained engineers. Working towards this vision statement, the organizers have planned the 3-Week “Capture the Bug”, a Design Verification Challenge.
Importance of the central theme: Debugging
Debugging takes up a major chunk of time in an ASIC Designer’s design turnaround time. In a time-intensive environment and complexity of designs incrementing multi-fold day-by-day, debugging is not just a trivial task, but is an integral skill in the domain of design verification.
The verification challenge helps to understand the verification intent to detect bugs in designs, understand debugging and fix the buggy designs. It provides practical exposure to real-world design verification activities
This hackathon launch is such a nice blend of startups, industry, and academia trusting each other, coming up with a plan during Semicon India 2022 (see images) and executing it by providing unique ed-tech solutions for massive skill development.
Stay tuned for more technical blogs about the Capture the Bug (CTB) hackathon