the flowchart is what you need to understand just to be an expert in the field of VLSI and semiconductors. Every topic shown in above image is a field, and every topic has a beautiful physics behind it, which when blended with tools in a video course, becomes a master-piece
a RISC-V cpu core is being placed using end-to-end opensource EDA tool. This is possible due constant effort and dedication by so many visionary people in industry, and will let you know all details about all of them very soon.
In on opensource RISC-V implementation flow, you move from right (Hardware) to Left (application program), and then coming from left, if you stop at middle (RISC-V ISA), that’s when you start thinking about this architecture from all angles, like sta, drc, congestion, clock skew, io latency, static and dynamic power, IR and many more
8-bits form a byte, 4-bytes form a word, 8-bytes form a doubleword,RV64 architecture can represent 18,446,744,073,709,551,615 patterns,Positive – MSB is ‘0’, negative – MSB is ‘1’-Range of signed numbers represented by RV64 architecture