Hi “Pictures speak it all” Finally, we all did it – VSDOpen – first ever online VLSI conference. Very close to a real one – […]
This paper describes an opensource padframe generator that was developed on the efabless platform for usage with the Open-Source Qflow Digital Synthesis Flow, for digital logic chips in the X-FAB XH018, 180nm process. It is presented by Philipp, who is a software developer with a strong background in security and cryptography. He is currently learning microelectronics.