Cloud Lab based Workshop
Digital Design on FPGA
This course will be an in-depth hands-on demo session on the Virtual FPGA Lab using the open-source Makerchip IDE Web platform. The course will start with the introduction of why we need Virtual FPGA Lab and going through the Github repository. Then we will introduce the participants to Verilog. Theory is useful, but nothing beats practice!! We will design a 4-way traffic light controller using the concept of Finite State Machines in Verilog. We then visualize the output with LEDs and seven-segment displays in the Makerchip Virtual FPGA platform. Every part of this course has a theory followed by a lab.The student is required to have just a basic understanding of logic gates and no knowledge of the EDA tools is required.
Section 1: Makerchip and Virtual FPGA Lab theory and Lab Setup
- Motivation: Why Virtual FPGA Lab and FPGA programming
- Going through the GitHub repository
- About the project – Simple 4-way traffic controller – problem statement and end result
- Intro to LEDs and seven-segment – theory and lab
Section 2: 4-way traffic light controller design
- Introduction to Finite State Machines theory
- Verilog FSM implementation of traffic light controller design
- Integrate with LED and seven-segment
Registration Fee – $10
20 October 2021
Bandgap IP Design using Sky130 technology node
This course will be an in-depth introduction to Bandgap Reference (BGR) design using open-source EDA tools (xschem?, ngspice, Magic, Netgen) and Google’s Skywater 130nm (SKY130) open-source process design kit (PDK) as well. This course will start with the big picture of why we need a temperature-independent voltage/current reference, review other methods of generating reference voltage/currents, and then dive deep into the concepts and design of a BGR. The course will focus on intuitive understating of the concepts involved in designing a BGR with real-world specifications and complete hands-on experience using the open-source EDA tools. During the 100 min course, the participant will start with the basic principles of BGR circuit, design and simulate using the SKY130 Spice models, and layout a complete industry-grade BGR using the SK130 PDK in Magic layout software. The participant will also extract the parasitic from the layout and do a post-layout simulation. And finally, the participants will be briefly introduced to the caravel harness to make tapeouts – all of that in just 100 mins! The student is required to have just a basic understanding of undergraduate circuits and no knowledge of the EDA tools is required.
Day 1 – BGR Theory and Lab setup
- Motivation: Why temperature-independent voltage/current references for ICs
- Simple voltage/current reference circuits and their problems as a reference.
- Introduction to the architecture of a temperature-independent voltage source.
- Realization of BGR voltage reference.
- Circuit realization of a self-biased BGR and introduction to PTAT/CTAT current source.
- Tool setup and design flow
- Introduction to PDK, specifications, and pre-layout circuits
- Circuit design simulation tool – Ngspice Setup
- Layout design tool – Magic Setup
Day 2 – BGR Labs and post-layout simulations
- BGR components circuit design
- BGR components circuit simulations
- Steps to combine BGR sub-circuits and BGR full design simulation
- Troubleshooting steps
- Layout design
- Layout Walkthrough
- Parasitics extraction
- Post Layout simulations
- Steps to combine layouts
- Tapeout theory
- Tapeout labs
Registration Fee – $25
21-22 October 2021