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Tag Archives: active under certain conditions

Power aware clock tree synthesis – Part 4

Hello We were looking for a solution for below scenario, and you will be amazed to see, how an ‘Universal Gate’ solves the below problem […]

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Power aware clock tree synthesis – Part 3

Hello And here’s the solution to the problem posted in my previous article. ‘AND gate itself’. If you observe carefully, you tie one of the […]

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