Skip to content
VLSI System Design Logo
  • Home
  • VSD Course
    • Courses
    • Design at $0
    • Projects
    • Workshop with EICT Academy IIT Guwahati
  • Blogs
    • VSD Video blog
    • VSD latest Blogs
    • VSD (Initial phase)
  • VSDOpen
    • 2019
    • VSDOpen 2019 Keynote & Virtual Demo
    • 2018
    • VSDOpen 2018 Keynote & Paper
  • About us !
    • #55 (no title)
    • VSD Library
    • Projects
    • Past Events
    • Upcoming Event…
    • Sign-up
  • Explore

Tag Archives: routing rules

Default-Rules Based Clock Tree Synthesis in open-source EDA

For hierarchical designs ~500k instance count, participants are expected to develop code which will build clock tree for a design which has close to ~50k sequential flip-flops using default routing rules

Continue reading

Blogs

© Copyright 2017 VLSI System Design Corporation
A SiteOrigin Theme