IP by Interns – VLSI System Design

Product Name	Students name and Github repo
VSDOpen 2023 RISC-V Product Development Hackathon Final Winner
Smart irrigation	Priyanshu Kumar Chaudhary and S Nithin (BMSCE, Bangalore) https://github.com/Pshort69420/Riscduino_Hackathon
MediEase-Simplifying-Health-Management	Advith and Supritha Bekal (Mangalore Institute of Technology & Engineering, Udupi) https://github.com/Advith147/MediEase-Simplifying-Health-Management#mediease-simplifying-health-management
“Smart Aquatic”: Smart and automated fish aquarium system	Alwin Dsouza , Prabal Raj (Mangalore Institute of Technology & Engineering, Udupi) https://github.com/xbnj/RISCDUINO-RvdPH.git
Solar Powered Automated Vacuum Lawn Mower	Shardul Satheskumar And Brunda S Kotian (RNSIT, Bangalore) https://github.com/Brunda-Kotian/SPLAVLM/tree/main
Bits n Bytes	Navya Tayi and Shubha Chaugule (PES University, Bangalore) https://github.com/Navya-tayi/riscv_product_hackathon
Reverse Vending Machine	Bobbili Mrudulakshi and Sanjay Barla (RGUKT- IIIT Nuzvid RGUKT-SRUKAKULAM College) https://github.com/BOBBILIMRUDULAKSHI/RISC-V_Product_hackathon
Secure Vision	Vanshika Tanwar and E Balakrishna (Dronacharya Group of Institutions, Greater Noida) https://github.com/BALAKRISHNA-EPPILI/Seceft_Defender
TopGun	Vinayak Mishra and Sahil Savanth M (BMSCE, Bangalore) https://github.com/Grossundnett/RISC-V-Hackathon.git
Melodica	Sujay Samuel Shanthakumar and Samuel Robinson R (SSN College of Engineering, Chennai) https://github.com/samrobin3333/Melody_Master_Jr/tree/main
K TECH SREE KANNA	Kanukuntla Rajashekhar and Boddula Navaneeth Kumar (Kakatiya university, Warangal Mahatma Gandhi University, Nalgonda) https://github.com/RAJASHEKHAR-KANUKUNTLA/MUNICIPAL_CORPORATION_SMART-E-DUSTBIN

RISC-V based Product	Student name and Github repo
Institute Name : IIIT Bangalore
Home Automation System with IoT Integration	Shubham Gaikwad https://github.com/ShubhamGitHub528/Home-Automation-System
Digital Alarm Clock	Iswarya I https://github.com/IswaryaIlanchezhiyan/RISC-V-Digital-Alarm-Clock
Anti - theft Compartment	Nitesh Sharma https://github.com/NiteshIIITB/Anti-theft_Compartment.git
Smart HVAC system	Vartika Barnwal https://github.com/Vartika-iiitb/Smart-HVAC-system/edit/main/README.md
Passcode based Authenticator for Locker	Shant Rakshit https://github.com/Shant1R/Locker_authenticator_RISCV
Contactless Water Level Controller	Alwin Shaju https://github.com/alwinshaju08/IIITB_Waterlevel_detector
Automatic street light system	G LASYA PUNYA SREE https://github.com/kachhadiyaraj15/iiitb_piso
Hall effect sensor based Door Alarm system	Amith Bharadwaj https://github.com/amith-bharadwaj/Hall_sensor_based_Door_Alarm.git
Automatic Sanitizer Dispenser	Kanish R https://github.com/KanishR1/RISCV_Automatic-Sanitizer-Dispenser
Gas leakage detector	Sushma R https://github.com/Sushma-Ravindra/gas_leakage_detector_riscv
Rain Alert System	Tushar Mavi https://github.com/mavi62/Rain_Alert_System.git
Sound based smart switch	Rachana Kaparthi https://github.com/Rachana-Kaparthi/Sound-based-smart-switch
Automatic Roof Controller	Valipreddy Pranathi https://github.com/V-Pranathi/Automatic_Roof_Controller
Automated room lighting control	Emil Jayanth Lal https://github.com/mrdunker/IIITB_auto_room_lc
BlindSight Aid	Nancy Gupta https://github.com/Nancy0192/BlindSight_Aid
Distance measuring	PRIYANSH PANDYA https://github.com/Priyanshiiitb/IIITB_Distance_measuring_device
Smart Bin	Lakshmi Sai Niharika Vulchi https://github.com/NharikaVulchi/Smart_Bin
Blind Sick	Simarjeet Singh Thethi https://github.com/simarthethi/asic_project_blind-stick.git
Security alarm system	Arul Vignesh J https://github.com/IIITB-ARUL/RISC_V-SECURITY_ALARM_SYSTEM.git
Temperature activated fan controller	Vaibhav Tiwari https://github.com/VaibhavTiwari-IIITB/temp_activated_fan_controller.git
Breath_Analyser-Detecting Presence_of_Alcohol	Divyam Satle https://github.com/DSatle/Breath_Analyser-Detecting_Presence_of_Alcohol-/blob/main/README.md
Fire alarm	Shivangi https://github.com/Shivangi2207/Fire_detector_RISCV.git
Touch Sensor Based Bell	Akhil Ganesh Asati https://github.com/akhiiasati/Touch_Bell_RISCV.git
Smart Traffic Light	Akul Sinha https://github.com/akul-star/RISCV_SMART_TRAFFIC_LIGHT
Conveyor Belt Object Detector	Solanki Pratikkumar Ashokkumar https://github.com/SolankiPratikkumar/IIITB_PRATIKKUMAR_ASIC/blob/main/Conveyor%20Belt%20Object%20Detector.md
Drip Irrigation system	Kopparthi Dinesh Lingaiah https://github.com/DINESHIIITB/iiitb_riscv_drip_irrigation_system
Obstacle Avoiding Car	Sahil Singh Rana https://github.com/SahilSira/ASIC_Project_Automatic_Stopping_Car.git
Social Distance detection	Pruthvi Parate https://github.com/Pruthvi-Parate/RISCV_Project_IIITB.git
Display controller	Bhargav D V https://github.com/bhargav-vlsi/RISCV-Display-controller
Industrial Production Line Counter system	Nitish Kumar https://github.com/nitishkumar515/Industrial_Production_Line_Counter_System.git
2 Player Arcade game	Ammula Shiva kumar https://github.com/ammulashiva/RISCV_ASIC_2_player_arcade_game.git
Magnetic Intruder Detection System	Aamod B K https://github.com/aamodbk/RISCV_magnetic_intruder_detector
Smart Home Power System with Burglar Alarm	Saket Gurjar https://github.com/hypnotic2402/smartHomeRISCV
Automated visitor counter	Nalamothu Sai Sampath https://github.com/NSampathIIITB/IIITB_Automated_visitor_Counter
Heart rate monitor	Yash Dhaarmesh Mogal https://github.com/Y09mogal/RISCV_Heart_Rate_Monitor
Hand Dryer	MALOBI MUKHERJEE https://github.com/malobimukherjee/RISCV-based-Project/tree/main
Home security alarm	Dilli Babu Porlapothula https://github.com/dillibabuporlapothula/RISCV-Motion_Detection_Alarm_System

Project Name	Student name and Github repo
Institute Name : IIIT Bangalore (MPW8)
Bidirectional Counter	Pankaj Agrawal hhttps://github.com/Pankaj1811/iiitb_bidicntr
Synchronous First In First Out for Memory Storage and Processing	Anmol Shetty https://github.com/Anmol-S314/iiitb_sfifo
Universal Asynchronous Receiver Transmitter Protocol based Hardware Transmitter	Jay shah https://github.com/jayshah1x/iiitb_uarttx
Universal Shift Register	Rakshit Bhatia https://github.com/rakshit-23/iiitb_usr
Vending Machine with Change System	Siddhant Nayak https://github.com/SiddhantNayak5/iiitb_vm
Car Parking System	Ishan Desai https://github.com/ishan-desai64/iiitb_cps
Parallel input Serial output Shift register	Raj Kachhadiya https://github.com/kachhadiyaraj15/iiitb_piso
8 bit BCD counter	Sritam Birtia https://github.com/Sritam519/iiitb_bcdc
Johnson counter	Aman Prajapati https://github.com/AmanP-IIITB/iiitb_jc
8-bit Gray code counter	Tejas B N https://github.com/TejasBN28/iiitb_gc
Linear feedback shift register	Ritesh Lalwani https://github.com/Riteshlalwani/iiitb_lfsr
Traffic Light Controller	Lokesh Maji https://github.com/majilokesh/iiitb_tlc
LIFO (Last in First out) Buffer	Yash Kothari https://github.com/yashkthr/iiitb_lifo
Three Bit Ring Counter	Arsh Kedia https://github.com/ArshKedia/iiitb_3bit_rc
Baud Rate Generator	Rohit Raj https://github.com/RohitR1301/iiitb_brg
PWM(Pulse width modulation) Generator	Himanshu Rai https://github.com/himanshu1308/iiitb_pwm
Serial In Parallel Out Shift Register	ADITYA SINGH https://github.com/adityasingh6256/iiitb_sipo
Elevator Controller	Nishit Chechani https://github.com/itsnishit/iiitb_elc
Bidirectional up/down counter	Ujjawal Sharma https://github.com/ujjawal0503/iiitb_bc
4 Bit Bidirectional Counter	Sahil Mahajan https://github.com/isahilmahajan/iiitb_4bbc
ASIC design of automatic washing machine	Archan Desai https://github.com/archandesai/iiitb_wm
Sequence Detection using Moore FSM	Anshul Mdurwar https://github.com/McLucifer2646/iiitb_sd
Sequence Detector 1010 (Without Overlapping) using Mealy Finite State Machine	Anuj Kumar Jha https://github.com/Anujjha1031/iiitb_sqd_1010
Parking Ticket Vending Machine	Suysh Mishra https://github.com/suysh-msra/iiitb_ptvm
Parallel in parallel out shift register	Priyanshu https://github.com/Priyanshu5437/iiitb_pipo
Arithmatic Logic Unit	Aashish Tiwary https://github.com/aashish-tiwary/iiitb_alu

Project Name	Student name and Github repo
Institute Name : IIIT Bangalore
Sequence detector_moore_machine(1011)	G.Ravi Kiran Reddy https://github.com/Gogireddyravikiran/iiitb_sd_fsm
Pulse Width Modulated Wave Generator with Variable Duty Cycle	Sanampudi Gopala Krishna Reddy https://github.com/sanampudig/iiitb_pwm_gen
RISC-V	Vinay Rayapati https://github.com/vinayrayapati/iiitb_rv32i
Ring Counter	Kavya Agarwal https://github.com/agarwal-kavya/iiitb_rc
Clock Gating	Vasanthi D R https://github.com/drvasanthi/iiitb_cg
Frequency Divider	Dantu Nandini Devi https://github.com/DantuNandiniDevi/iiitb_freqdiv
Real-time clock	Banda Anusha https://github.com/Bandaanusha/iiitb_rtc.git
Universal shift register	Debangana Mukherjee https://github.com/DebanganaMukherjee/iiitb_usr
101011 Sequence detector _Mealy_Machine	Ajay Kumar https://github.com/AjayKumar-Gandi/iiitb_sd101011
PISO shift register	Mahati Basavaraju https://github.com/mahati-basavaraju/iiitb_piso
Ring counter	Ramya S https://github.com/RamyaIIIT/iiitb_4bitrc
Radix-2 4-Bit Booth's Multiplier	Yashwant https://github.com/YASHWANT98/iiitb_r2_4bit_bm

Name	University	Project Title	Github Link
Mansi Mohapatra	Indira Gandhi Delhi Technical University for Women (IGDTUW)	SoC design using RISC-V based core and 10-bit DAC Sky130 IP	https://github.com/vsdip/rvmyth_avsddac_interface
Mili Anand	Indira Gandhi Delhi Technical University for Women (IGDTUW)	SoC design using RISC-V based core and 10-bit DAC Sky130 IP	https://github.com/vsdip/rvmyth_avsddac_interface
Balaji Rao Vavintaparthi	BML Munjal University	RISC-V based SOC Design with PLL using Open-Source EDA Tools	https://github.com/vsdip/rvmyth_avsdpll_interface

Name	University	Project Title	Github Link
Sumanto Kar	FR. CONCEICAO RODRIGUES COLLEGE OF ENGG.	Sziklai Pair Amplifier	https://github.com/Eyantra698Sumanto/avsdspamp_3v3_sky130
Nalinkumar S	Madras Institute of Technology Campus, Anna University	CURRENT STARVED VCO TARGETING	https://github.com/Nalinkumar2002/avsdvco_1v8
R.V.Rohinth Ram	Madras Institute of Technology Campus, Anna University	Two Stage CMOS Operational Amplifier	https://github.com/rohinthram/avsd_opamp
Mohammad Khalique Khan	Aliah University, Kolkata	8-bit priority encoder	https://github.com/Khalique13/dvsd-8-bit-priority-encoder
Charaan S	Madras Institute of Technology Campus Anna University	Design and Analysis of Dickson Charge Pump using CMOS technology	https://github.com/Charaan27/avsddcp_1v8_sky130
A DEVIPRIYA	Cambridge Institute of Technology, K R Puram, Bangalore	Serializer	https://github.com/Devipriya1921/vsdserializer_v1
Madhuri Hemant Kadam	Shree L. R. Tiwari College of Engineering	The Two Stage CMOS Operational Amplifier with Frequency Compensation	https://github.com/MadhuriKadam9/avsdopamp_3v3_sky130_v2

Name	University	Project Title	Tech Node	Github Link
Anmol Purty	M.tech from National Institute of Technology, Warangal	General Purpose bandgap	SKY130	https://github.com/vsdip/avsdbgp_3v3_sky130_v2
Harsh Shukla	MS Analog and Mixed Signal Design, Arizona State University	10 placeable Standard Cell library design, layout and characterization (just like inv design in workshop) with 4 drive strengths of each. Total 40 standard cells	SKY130	https://github.com/vsdip/vsdStdCellCharacterizer_sky130
Harshitha Basavaraju	PhD Scholar @ University of Bundeswehr, Munich, Germany	10bit potentiometric DAC 3.3v analog voltage, 1.8v digital voltage and 1 off-chip external voltage reference	SKY130	https://github.com/vsdip/avsddac_3v3_sky130_v1
Malay Marut Das	EDI Analyst at Miracle Software Systems, Inc., Portland, Oregon, United States	Lower power current programmable CMOS comparator with hysteresis	SKY130	https://github.com/vsdip/avsdcmp_3v3_sky130
S Skandha Deepsita	PhD Scholar @ IIITDM Kancheepurama	10bit potentiometric DAC 3.3v analog voltage, 1.8v digital voltage and 1 off-chip external voltage reference	SKY130	https://github.com/vsdip/avsddac_3v3_sky130_v1
Sameer S Durgoji	B.Tech (Electronics and Communication Engineering), National Institute of Technology Karnataka	10bit potentiometric DAC 3.3v analog voltage, 1.8v digital voltage and 1 off-chip external voltage reference	SKY130	https://github.com/vsdip/avsddac_3v3_sky130_v2
Shalini Kanna	Master of Science in Computer Engineering, University of Massachusetts Lowell	10bit potentiometric DAC 3.3v analog voltage, 1.8v digital voltage and 1 off-chip external voltage reference	SKY130	https://github.com/vsdip/avsddac_3v3_sky130_v1
Shon Pravin Taware	M.Tech. Embedded System and VLSI Design, Shri Guru Gobind Singhji Institute of Engineering and Technology, Vishnupuri, Nanded	OpenRAM configuration for SRAM (1024 x 32): (32kbits or 4kB), 1.8V and access time is <2.5ns	SKY130	https://github.com/vsdip/vsdsram_sky130
Subham Mohapatra	Electrical & Electronics undergrad, NIT Karnataka	On-chip PLL (avsdpll_3v3) Clock multiplier (pll) (Fclkin – 5MHz to 12Mhz, Fclkout – 40MHz to 100MHz at 1.8v) characterization TCL flow for sky130 tt, ss, ff, sf, fs corners	SKY130	https://github.com/vsdip/avsdpll_1v8_sky130_ss
Swarup Pulujkar	Hardware Development Engineer at eZono AG, Germany	General Purpose bandgap	SKY130	https://github.com/vsdip/avsdbgp_3v3_sky130_v1https://github.com/vsdip/avsdbgp_3v3_sky130_v1

Name	University	Project Title	Tech Node	Github Link
OpenLANE based projects
Deepak Verma	IIIT Sonepat	Design of 4KB(1024*32) SRAM 1.8V with operating voltage 1.8v and access time < 2.5ns	SKY130	https://github.com/Deepak42074/vsdsram_sky130
Pradeepkumar S K	Kalpataru Institute of Technology, Tiptur, Karnataka	Design of 4KB Static RAM 1.8V (access time <2.5ns) using OpenRAM and Sky130 node	SKY130	https://github.com/pradeepsk13/vsdsram_sky130_1.8V
Roshan Khatri Luitel	Punjab University	PLL IP to be tested is included in the SOIC-24 package to communicate with external circuitry present in the testboard	SKY130	https://github.com/rsnkhatri3/vsdPLLSoC
Lakshmi S	Georgia Institute of Technology, USA	8x PLL Clock Multiplier IP with an input frequency range of 5Mhz to 12.5Mhz and output frequency range of 40Mhz to 100Mhz, giving a 8x multiplied clock at ~50% duty cycle on tt corner at room temperature.	SKY130	https://github.com/lakshmi-sathi/avsdpll_1v8
RISC V
A RADHIKA	University of Hyderabad (UOH), Hyderabad	RISCV Developement Board	NIL	https://github.com/Kunal-Radhika/vsdDevBoard_v0

Name	University	Project Title	Tech Node	Github Link
OpenLANE based projects
Praharsha Mahurkar	Maharashtra Institute of Technology, Pune	OpenLANE RTL2GDS for mixed signal SoC (Inputs = mixed signal Verilog, OpenLANE RTL2GDS tools, outputs = GDSII)	SKY130	https://github.com/praharshapm/vsdmixedsignalflow
Nickson Jose	VSD Intern	Standard cell characterization flow using ngspice/Magic/OpenLANE	SKY130	https://github.com/nickson-jose/vsdstdcelldesign
Euler’s path generation
Sethupathi Balakrishnan	VSD Intern	Open-source Layout Generator (Inputs = Digital or Analog Circuit, Output = Layout)	OSU180	https://github.com/sethupathib/vsdGraphExtractor
SRAM (4kB) using OpenRAM
Yash Kumar	Fr. Conceicao Rodrigues College of Engineering, Mumbai	SRAM (1024 x 32): (32kbits or 4kB), 1.8V and access time is <2.5ns (OpenRAM)	OSU180	https://github.com/yash-k99/vsdsram
Reuel Reuben	BVPCOE, Mumbai	SRAM (1024 x 32): (32kbits or 4kB), 1.8V and access time is <2.5ns (OpenRAM)	OSU180	https://github.com/ReuelReuben/vsdSRAM
Penumarthi Aishwarya	NIT Jamshedpur	SRAM (1024 x 32): (32kbits or 4kB), 1.8V and access time is <2.5ns (OpenRAM)	OSU180	https://github.com/aishwaryapenumarthi/VSDSRAM
On-chip 8x clock multiplier
Paras Sanjay Gidd	Manipal Institute of Technology,(MAHE)	On-chip Clock multiplier (pll) (Fclkin – 5MHz to 12Mhz, Fclkout – 40MHz to 100MHz at 1.8v	OSU180	https://github.com/parasgidd/avsdpll_3v3/
Abel Joseph John	NSS College of Engineering, Palakkad	On-chip Clock multiplier (pll) (Fclkin – 5MHz to 12Mhz, Fclkout – 40MHz to 100MHz at 1.8v		https://github.com/eddygta17/avsdpll_3v3
10-bit DAC
Ashutosh Sharma	IIITD&M Kurnool	10bit potentiometric DAC 3.3v analog voltage, 1.8v digital voltage and 1 off-chip external voltage reference	OSU180	https://github.com/xzlashutosh/avsddac_3v3
Neethu Johny	B.M.S College of Engineering, Bangalore	10bit potentiometric DAC 3.3v analog voltage, 1.8v digital voltage and 1 off-chip external voltage reference		https://github.com/neethujohny/avsddac_3v3
10-bit ADC
Sheryl Corina Serrao	Fr. Conceicao Rodrigues College of Engineering, Mumbai	10-bit ADC 3.3v analog voltage, 1.8v digital voltage and 1 off-chip external voltage reference	OSU180	https://github.com/ADC-TEAM2020/avsdadc_3v3
V.UDAY	Siddhartha Institute Of Technology	10-bit ADC 3.3v analog voltage, 1.8v digital voltage and 1 off-chip external voltage reference	OSU180
Shalini Priya	NIT Jamshedpur	10-bit ADC 3.3v analog voltage, 1.8v digital voltage and 1 off-chip external voltage reference	OSU180
Ananya Ghorai	IIT(ISM) Dhanbad	Comparator part of ADC	OSU180

NAME	UNIVERSITY/INSTITUE	PROJECT TITLE	TECH NODE	GITHUB LINK
Ankur Sah	National Institute of Technology, Jamshedpur	General purpose band-gap reference with N-well resistors at VDD=3.3v, Vbgp=1.2v	OSU018	https://github.com/ankursah5/avsdbgp_3v3
Anusha R	Visveswaraya Technological University(VTU)	6T-SRAM cell	OSU018	https://github.com/Anushar123/vsdsram
Bellana Avinash Naidu	NATIONAL INSTITUTE OF TECHNOLOGY, ROURKELA	10bit potentiometric DAC 3.3v analog voltage, 1.8v digital voltage and 1 off-chip external voltage reference@osu180nm	OSU018	https://github.com/VSD-DACteam/avsddac_3v3
Charu Gupta	DTU, Delhi	Open-source Power analysis tool - average switching power and leakage power using Python engine	OSU018	https://github.com/CharuGupta-eng/vsdOSPowerCalc
Jayasri Veeravilli	SRM University	10bit potentiometric DAC 3.3v analog voltage, 1.8v digital voltage and 1 off-chip external voltage reference@osu180nm	OSU018	https://github.com/VSD-DACteam/avsddac_3v3
Nalla Gowthami	National Institute of Technology Rourkela	Bi-directional Buffer with Non-Inverting CMOS Input and Gated Pull-down and Pull-up	OSU018	https://github.com/gowthaminalla/vsdbbcud4f
Neelam Buddhiram Chaurasiya	Mumbai University	10bit potentiometric DAC 3.3v analog voltage, 1.8v digital voltage and 1 off-chip external voltage reference@osu180nm	OSU018	https://github.com/VSD-DACteam/avsddac_3v3
Prithivi Raj K	National Institute Of Technology, Tiruchirapalli	4-input &2-input, 1-output 3.3V analog multiplexer with 1.8V digital select line@osu180nm	OSU018	https://github.com/prithivjp/avsdmux4x1_3v3 https://github.com/prithivjp/avsdmux2x1_3v3
Sheryl Corina Serrao	Mumbai University	General purpose band-gap reference with N-well resistors at VDD=3.3v, Vbgp=1.2v	OSU018	https://github.com/sherylcorina/avsdbgp_3v3
Tanvi Arora	Deenbandhu Chhotu Ram University of Science and Technology,Murthal,Sonipat	Bi-directional Buffer with Non-Inverting CMOS Input and Gated Pull-down and Pull-up	OSU018	https://github.com/tanviarora23/vsdbbcud4f
YALAMANCHILI VAHINI	NIT JAMSHEDPUR	Open-source Power analysis tool - average switching power and leakage power using TCL engine	OSU018	https://github.com/yalamanchilivahini5/vsdtclpowertool

Name	University	Project Title	Github Link
Mohammad Amin	SRBIAU	RISC-V based SoC for 8x-PLL and 10-bit DAC calibration using Sky130	https://github.com/manili/VSDBabySoC
Sai Charan Lanka	Vardhaman College	"VEZZAL – A Testing Environment for OS-EDA tools"	https://github.com/lankasaicharan/vezzal
Mufutau Akuruyejo	Gatech	"Design and Analysis of a RISC-V core with an external Instruction Memory SRAM Using Opensource Tools"	https://github.com/vsdip/VSDMemSoC

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