TAU 2019 Contest Announcement Dr.George Chen, received a bachelor’s of electrical engineering from Caltech and a doctorate degree from Stanford University. He is the Timing Domain Lead in the Programmable Solutions Group at Intel Corporation. Related Posts:What I did in 8-weeks-VSD Internship- 10-Bit Digital…What I did in 8-weeks-VSD Internship? – Graph…SiFive RISCV Symposium Day 1 - Blockbuster opening…Worried about liberty basics? Let's start from ground zero!!Distributed timing analysis webinarLet's re-think open-source EDA - core and die Posted in Conference, TAU Contest, VSDOpen 2018 Conference papers.