Embedded and Chip design Education curriculum – All in one via VSDSquadron

While you could do an embedded system design course using “vsdsquadron”, but you could do a lot more as “vsdsquadron” is built for chip designers. With a comprehensive curriculum covering topics such as RISC-V ISA, digital logic design, PCB design, and more, learners can gain a solid foundation in electronics system design and chip design. Additionally, the availability of opensource simulation tools, PDKs and verification resources ensures that learners can explore these subjects in-depth and develop a deeper understanding of the concepts.

There are a bunch of topics, infact an entire chip design curriculum which you can learn using “vsdsquadron”, but let me give you a quick summary of topics which you can cover using “vsdsquadron

Topic 1 -  Development Kit specification design

The Development Kit specification design covers several topics related to the design of a development board. It includes the system hardware specifications necessary for real-time applications, the system architecture, block diagrams, and data flow. Additionally, it explains the need for specific components such as a RISC-V chip, WiFi+BT module, K20 uC, 32MBIT flash, and a supervisor circuit. The document also outlines the board design flow, from initial specification to final PCB layout. Overall, the specification design aims to provide a comprehensive guide for designing a development kit that meets the requirements of real-time applications.

Topic 2 - Discrete Devices – Resistors, Capacitors, Diodes (TVS, LED), Connectors, Transistors, Switches, Regulators, Oscillators and Crystal

The Discrete Devices document covers a variety of electronic components, including ceramic capacitors, MLCC capacitors, resistors, ESD suppressors/TVS diodes, diodes, LEDs, connectors (header, USB, power barrel), transistors, switches, regulators, oscillators, and crystals. The document provides detailed information on the specifications and characteristics of each component, including their voltage and current ratings, package sizes, and application areas. The variety of discrete components covered in the document reflects their importance in building complex electronic systems and highlights the need for engineers and designers to have access to a wide range of components to create custom electronic solutions.

Topic 3 - PCB Power supply design and Interfaces in schematics

The PCB Power Supply Design and Interfaces in Schematics document covers a range of topics related to power supply design and interface circuitry in electronic systems. The document highlights the importance of power supply design and the use of ferrite beads for filtering circuitry to prevent electromagnetic interference (EMI) in the system. It also discusses power sequencing and the use of multiple power supplies, as well as the importance of LDOs and DC/DC converters in voltage regulation. The document also covers the need for pullup/pulldown series resistors and decoupling capacitors, differential/single-ended signals, capacitors for crystal, reset circuits, protection diodes, DDR4 interfaces, level translators, USB connectors, and Ethernet interfaces. Overall, the document emphasizes the importance of effective power supply design and interface circuitry for the reliable and efficient operation of electronic systems.

Topic 4 - RISC-V based MYTH (uP for You in Thirty Hours) and RISC-V functional verification

The topics covered in RISC-V based MYTH (uP for You in Thirty Hours) and RISC-V functional verification are: RISC-V ISA, GNU compiler tool-chain and ABI, digital logic design, single-stage and pipelined RISC-V micro-architecture design, directed test-bench, bus functional models, UVM testbench, sequencers, snooper, monitors, memory-mapped (APB/Avalon) and UVM factory, derived sequence items, design arithmetic unit and high-speed adder circuits, pipelining and Wallace tree multiplier, sequential circuits, and cache coherent protocol.

 

Topic 5 – RISC-V SoC design, CAD for VLSI design, Synthesis, CMOS circuit design and SPICE simulations

The topics covered in these three courses include RISC-V based SoC design, CAD for VLSI design, CMOS circuit design, SPICE simulations, logic synthesis, and RISC-V physical design. In the RISC-V SoC design course, analog components, analog calibration, SoC memory map, and top-level connections are covered, while the CAD for VLSI design course covers logic synthesis, compilation, translation, and linking, as well as optimization in synthesis. The CMOS circuit design course covers NMOS/PMOS basics, velocity saturation, CMOS VTC, CMOS static/dynamic behavior, and CMOS robustness, along with Threshold voltage Id-Vds and Id-Vgs simulations.

Topic 6 - Analog IP design – Bandgap, PLL, ADC, DAC Comparator, 4kB SRAM

The topics covered in Analog IP Design include Bandgap references, Phase-Locked Loops (PLL), Analog-to-Digital Converters (ADC), Digital-to-Analog Converters (DAC), Comparators, and 4kB Static Random-Access Memory (SRAM). For Bandgap references, the course covers the principles of generation, start-up circuit, PSRR, temperature co-efficient, and design/layout techniques. In PLL, the focus is on clock multiplier, VCO, PFD, charge-pump, frequency divider, and design/layout techniques. The ADC course covers functionality, resolution, INL, DNL, prep time, conversion time, timing diagram, and design/layout techniques. Similarly, the DAC course covers functionality, resolution, accuracy, FSV, 1LSB, and DNL. The Comparator course focuses on functionality, hysteresis, propagation delay, noise requirement, and design/layout techniques. Lastly, the course on 4kB SRAM covers SRAM architecture, 6T memory cell, butterfly curve, sense amplifier, write driver, tri-state buffer, pre-charge circuit, layout, design techniques, and OpenRAM compiler configuration.

Topic 7 - RISC-V SoC Physical design implementation

The RISC-V SoC Physical design implementation covers the process of synthesizing the design using target process and IP's, followed by IO port placement, floorplanning, power planning, and IP placement. The process also includes full-chip integration, place and route (PNR), static timing analysis (STA), design rule check (DRC), and layout versus schematic (LVS) checks. This phase ensures the design meets timing and power constraints and that there are no manufacturing defects in the final layout.

Topic 8 - PCB design

The topics covered in PCB design include component placement, which can have a significant impact on the board's performance, PCB stack-up, which affects EMI/EMC, and routing techniques. Additionally, BOM, Gerber files, and assembly guidelines are covered, which are necessary for manufacturing and assembly. By mastering these skills, designers can create high-quality, reliable PCBs that meet the specifications and requirements of the application.

 

The VSDSquadron educational board provides a unique opportunity for learners to gain hands-on experience in electronics system design and chip design. The board's open-source nature allows for easy access to IPs, PDKs, and tools, including RISC-V, providing learners with a complete and comprehensive curriculum in these areas. With the board's built-in modules covering a range of topics such as analog IP design, RISC-V SoC design, PCB design, and more, learners can acquire practical skills and knowledge essential for a career in the field. In summary, the VSDSquadron educational board offers a rich and dynamic learning experience in electronics system design and chip design.

International payments are now open. You can pre-order your board using below link

https://www.vlsisystemdesign.com/vsdsquadron/

Registration for Ethical RISC-V IoT Workshop

Welcome to Ethical RISC-V IoT Workshop

The “Ethical RISC-V IoT Workshop” at IIIT Bangalore, organized in collaboration with VSD, is a structured, educational competition aimed at exploring real-world challenges in IoT and embedded systems. Participants progress through three stages: building an application, injecting and managing faults, and enhancing application security. The event spans from May 9 to June 15, 2024, culminating in a showcase of top innovations and an award ceremony. This hands-on hackathon emphasizes learning, testing, and securing applications in a collaborative and competitive environment.

Rules :
  1. Only for Indian Student whose college is registered under VTU
  2. Only team of 2 members can Register
  3. Use only VSDSquadron Mini resources for product development
Awards :
  1. Prize money for final 10 Team
  2. 3 Winner team’s Product will be evaluated for Incubation
  3. 7 consolation prizes
  4. Completion Certificate to final round qualifier
  5. Chance to build a Proud Secured RISC-V Platform for India

Date for Registration : 9th May - 22nd May, 2024
Hackathon Inauguration : 23rd May 2024

VSDSquadron (Educational Board)

VSDSquadron, a cutting-edge development board based on the RISC-V architecture that is fully open-source. This board presents an exceptional opportunity for individuals to learn about RISC-V and VLSI chip design utilizing only open-source tools, starting from the RTL and extending all the way to the GDSII. The possibilities for learning and advancement with this technology are limitless.

Furthermore, the RISC-V chips on these boards should be open for VLSI chip design learning, allowing you to explore PNR, standard cells, and layout design. And guess what? vsdsquadron is the perfect solution for all your needs! With its comprehensive documentation and scalable labs, thousands of students can learn and grow together.

VSD HDP (Hardware Design Program) Duration-10 Week

With VSD Hardware Design Program (VSD-HDP),  you have the opportunity to push the boundaries of what exist in open source and establish the new benchmark for tomorrow.

It will leverage your degree in Electrical or Computer Engineering to work with

  • Programmable logic
  • Analog/ digital IP
  • RISC-V
  • Architecture & microprocessors
  • ASICs and SoCs on high-density digital or RF circuit cards
  • Gain hands-on knowledge during design validation and system integration.

Sounds exciting to just get started with expert mentors, doesn’t it? But we are looking for the next generation of learners, inventors, rebels, risk takers, and pioneers.

“Spend your summer working in the future !!”

Outcomes of VSD Online Research IP Design Internship Program

  1. Job opportunities in Semiconductor Industry
  2. Research work can be submitted to VLSI International journals
  3. Participate in Semiconductor International Conference with Internship Research Work
  4. Paper Publications in IEEE Conference and SIG groups
  5. Tape out opportunity and IP Royalty
  6. Interact with world class Semiconductor designer and researchers
  7. Academic professions where more research projects are encouraged.
  8. All the above research and publication work will help colleges and institutes to improve accreditation levels.

Know More Information

VSD – Intelligent Assessment Technology (VSD-IAT)

VSD – Intelligent Assessment Technology (VSD-IAT) is expertly built training platform and is suited for designer requirements. Semiconductor companies understand the value of training automation and Engineer performance enhancement, and do not need to be convinced of the impact of a virtual platform for learning. VSD trainings are quick, relevant, and easy to access from any device at any time zone.

VSD Intern Webinars

VSD Interns made it happen !!

VSD is working towards creating innovative talent pool who are ready to develop design and products for the new tech world. VSD believes in “Learning by doing principle” , and always prepare the student to apply the knowledge learned in the workshops, webinars and courses. We always push our students to work on new designs, test it and work continuously till it becomes the best performing design. Any student who enrolls to VSD community starts working with small design and grows with us and develops a tapeout level design with complete honesty and dedication towards the Work !!

Check out VSD Interns Achievement!

VSDOpen Online Conference

Welcome to the World’s only online conference in Semiconductor Industry VSDOpen Conference. With enormous support and global presence of audience from different segments of industrial lobby and academia made a highly successful event. Evolution is change in the genetic makeup of a population over time, online conference is one kind evaluation everyone adapt soon. 

  • VSDOpen 2022 is an online conference to share open-source research with the community and promote  hardware design mostly done by the student community.
  • VSDOpen 2022 is based on the theme “How to lower the cost to learn, build, and tapeout chips ?”  , which will provide a platform to community to build stronger designs and strengthen the future of Chip design.
  • VSDOpen is envisioned to create a community based revolution in semiconductor hardware technology.
  • The open source attitude is required to bring out the talent and innovation from the community who are in remote part of world and have least access to the technologies.  And now Google support will help to bring the vision to execution by VSD team

VSD Online Course by Kunal Ghosh

VSD offers online course in complete spectrum of vlsi backend flow from RTL design, synthesis and Verification, SoC planning and design, Sign-off analysis, IP Design, CAD/EDA automation and basic UNIX/IT, Introduction to latest technology – RISC-V, Machine intelligence in EDA/CAD, VLSI Interview FAQ’s.

Current Reach – As of 2021, VSD and its partners have released 41 online VLSI courses and was successfully able to teach  ~35900 Unique students around 151 countries in 47 different languages, through its unique info-graphical and technology mediated learning methods.

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