Master CMOS circuit design from first principles to advanced robustness analysis in this intensive 10‑days, hands‑on workshop powered by the open‑source SKY130 technology node. Guided by seasoned VSD instructors, you will model transistors, extract switching‑thresholds, optimize noise margins, and evaluate power‑supply and process variations using professional SPICE flows. High intensity Labs transform theory into measurable plots, while curated reference decks ensure reproducibility long after the course.
Join a global cohort of engineers and graduate with silicon‑ready design insight, simulation mastery, and a certificate recognised across international semiconductor ecosystems. Enroll today
This workshop is designed to provide a deep understanding of CMOS design fundamentals through SPICE simulations. Over five days, participants will explore the behavior of NMOS and CMOS inverters in different operating regions, evaluate switching thresholds, noise margins, and analyze robustness against supply and device variations. Each session includes hands-on SPICE simulations backed by strong theoretical foundations, making it ideal for learners who wish to master transistor-level circuit behavior.
The global semiconductor resurgence – fueled by sovereign CHIPS initiatives, a surging demand for edge‑AI silicon, and an acute shortage of analog‑mixed‑signal talent – has made open, mature‑node platforms like SKY130 the fastest on‑ramp from idea to tape‑out. This ten‑day, cloud based online workshop positions you at the heart of that movement, translating industry‑grade CMOS theory into actionable design insight while leveraging the very PDK that start‑ups, national fabs, and university shuttle programs now rely on for first‑silicon success.
Across 10-days, you will dissect device physics, construct parameter‑swept SPICE decks, and benchmark inverter robustness under real‑world process and voltage variation. Each module pairs concise lectures with guided labs – covering velocity‑saturation, noise‑margin optimisation, dynamic power analysis, and script‑driven verification – so every concept is cemented by plots you generate yourself. Exclusive toolchains, reference designs, and daily design clinics ensure you leave with reusable IP blocks and a repeatable simulation workflow that dovetails directly into open‑source RTL‑to‑GDS flows such as OpenLane and VSDFlow.
Graduates emerge ready to contribute immediately to low‑power IoT nodes, automotive safety ICs, and chiplet‑based heterogenous packages – all markets leaning heavily on 130 nm for cost‑balanced innovation. Whether you aim to upskill a design team, strengthen research credentials, or fast‑track a prototype toward fabrication, this program delivers the simulation mastery and process‑aware mindset demanded by today’s accelerated semiconductor landscape.
Kunal Ghosh, the visionary co-founder of VLSI System Design (VSD) Corp. Pvt. Ltd., stands at the forefront of online open-source EDA and hardware design education, particularly in the realm of RISC-V.
With a portfolio of 50 top-tier VLSI online courses, Kunal has enriched the learning journey of over 90,000 students across 153 countries. His expertise extends beyond training; he’s actively involved in pioneering open-source projects and design collaborations with esteemed institutions like IIT Madras, IIT Bombay, IIT Guwahati and IIT Hyderabad.
His current focus is on crafting high-quality open-source Analog/Digital IPs, a groundbreaking endeavor in open-source hardware design. Kunal’s rich industry experience includes roles at Qualcomm and Cadence, specializing in SoC design. He holds a master’s degree from IIT Bombay, where he specialized in VLSI & Nano-electronics, with a focus on sub-100nm Electron Beam Lithography Optimization techniques.
Yes. The entire workshop runs on a cloud‑hosted platform, so you can log in whenever it suits you, watch the day’s lectures, complete the SPICE labs, and log out. Round‑the‑clock mentor support is available via WhatsApp, staffed by experts in multiple time zones throughout the ten‑day program.
Absolutely. Seasoned ASIC and SoC engineers regularly use this boot camp to renew transistor‑level intuition, benchmark SKY130 workflows, and adopt the latest open‑source methodologies. The material scales—letting veterans dive deeper into advanced sizing, PVT analysis, and low‑power optimisation while networking with peer professionals.
Yes. We start from first principles—introducing MOSFET physics, basic SPICE syntax, and step‑by‑step inverter design—before moving to advanced topics. Detailed lab guides and continuous mentor support ensure first‑time learners can follow along and succeed.
Workshop videos, notes, and netlist templates remain available for the full ten‑day window. Because this is an industry‑oriented, time‑boxed sprint, all graded lab submissions must be completed within those ten days to qualify for certification.
No. All simulations run on the VSD Virtual Desktop Infrastructure (VDI) that you’ll access on day one using a lightweight client. After the workshop, we provide scripts and templates so you can install the same toolchain on your personal system if desired.
Over the past five years, more than 1,000 engineers and students have completed this program and leveraged its CMOS‑gate foundations to excel in analog design, static‑timing analysis, and ECO roles at top semiconductor and EDA firms. Recruiters know the certificate signals job‑ready competence in circuit design and SPICE verification, making it a powerful credential for your résumé.
Cloud based Workshop
VSD, standing as a trailblazing Semiconductor EdTech company and a community-based Technology Aggregator, is revolutionizing the landscape of VLSI Design. With the belief that “Creativity is just connecting things”, VSD has mastered the art of linking the right resources with the community. This unique approach has sparked a significant transformation in the VLSI Design process.
Over the past decade, VSD has made remarkable strides in the open-source semiconductor domain. Our journey includes the development of comprehensive training content, empowering students to design silicon-grade IP/SoC. Notably, we’ve successfully guided these projects through the tapeout cycle via the Google open shuttle program. This achievement is a testament to our commitment to hands-on, practical education.
At VSD, our role extends beyond traditional education. While we didn’t invent EDA tools or design flows, we’ve made them accessible to a wider community. Our mentorship has been instrumental in the development of over 50+ Analog/Digital IPs and solutions. Impressively, 20+ of these have successfully transitioned from concept to Silicon – a clear indicator of our effective approach and the high quality of work produced under our guidance.
We pride ourselves on fostering a community-based revolution in the Semiconductor Industry. By democratizing access to advanced tools and knowledge, VSD is not just educating individuals; we are building a community of innovators poised to lead the next wave of advancements in the semiconductor sector. With VSD, the future of VLSI Design is not just being written; it’s being rewritten by a passionate and empowered community.
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Welcome to the World’s only online conference in Semiconductor Industry VSDOpen Conference. With enormous support and global presence of audience from different segments of industrial lobby and academia made a highly successful event. Evolution is change in the genetic makeup of a population over time, online conference is one kind evaluation everyone adapt soon.
VSD offers online course in complete spectrum of vlsi backend flow from RTL design, synthesis and Verification, SoC planning and design, Sign-off analysis, IP Design, CAD/EDA automation and basic UNIX/IT, Introduction to latest technology – RISC-V, Machine intelligence in EDA/CAD, VLSI Interview FAQ’s.
Current Reach – As of 2021, VSD and its partners have released 41 online VLSI courses and was successfully able to teach ~35900 Unique students around 151 countries in 47 different languages, through its unique info-graphical and technology mediated learning methods.
