VSD - Clock Tree Synthesis - Part 2


This course is a follow-up course of "VLSI Academy - Clock tree synthesis - Part 1". So its highly recommended to go through Part 1 of clock tree synthesis

Clock is a critical part of any VLSI chip, and this course takes you to the advanced level of building a clock tree from scratch for millions of flop.

While we plan to add some experimental videos and courses very soon, as a supplement, this one has real time examples and problems that you see on a real chip, and even solutions to those problems

The course is structured in below format:

  • Introduction
  • Clock tree optimization checklist
  • How to build clock tree for uneven spread of clock end-points
  • Power aware clock tree synthesis
  • Static timing analysis with real clocks


  • Introduction to Clock tree Synthesis
  • Clock Tree Optimization Checklist

    • Optimization Checklist
    • Leakage Current Reduction Technique
    • Short Circuit Current Reduction Technique
    • Clock Tree Optimized
    • Optimized Clock Tree Power And Latency Check
  • Uneven Spread of Clock Endpoints

    • Clock Tree for Uneven Spread of Clock End Points
    • Clock Tree for Uneven Spread of Clock End Points
    • Checklist
    • Advanced H-Tree for Million Flop clock endpoints with uneven spread
  • Power Aware Clock Tree Synthesis
    • Introduction to clock gating cells
    • Introduction to Delay Tables
    • Delay Table Usage - I
    • Delay Table Usage - II
    • Clock Gating Technique using AND Gate and Skew Issue
    • Solution to Skew Issue
    • Clock Gating technique using both AND and OR gate
    • Clock Gating Technique using universal NAND gate
    • Clock Gating Technique on real Chip and its impact on Power
  • Static Timing Analysis
    • Setup Timing Analysis with Real Clocks
    • Introduction to Data Arrival Time, Data Required Time and Slack
    • Impact of unbalanced Skew on Setup Time
    • Hold Timing Analysis with Real Clocks
    • Impact of unbalanced Skew on Hold Time
  • Topics Learned and More to come!!

Audience Profile

  • Individuals keen to learn about VLSI and Chip World


  • Individuals having Basic Knowledge of Electrical and Electronics

Tools Used


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